55 */
66
77/******************************************************************************
8- * Copyright (C) 2022 Maxim Integrated Products, Inc., All Rights Reserved.
8+ * Copyright (C) 2023 Maxim Integrated Products, Inc., All Rights Reserved.
99 *
1010 * Permission is hereby granted, free of charge, to any person obtaining a
1111 * copy of this software and associated documentation files (the "Software"),
@@ -88,7 +88,9 @@ extern "C" {
8888typedef struct {
8989 __I uint32_t sistat ; /**< <tt>\b 0x00:</tt> SIR SISTAT Register */
9090 __I uint32_t siaddr ; /**< <tt>\b 0x04:</tt> SIR SIADDR Register */
91- __R uint32_t rsv_0x8_0xff [62 ];
91+ __R uint32_t rsv_0x8_0x27 [8 ];
92+ __IO uint32_t btle_ldo_trim ; /**< <tt>\b 0x28:</tt> SIR BTLE_LDO_TRIM Register */
93+ __R uint32_t rsv_0x2c_0xff [53 ];
9294 __I uint32_t fstat ; /**< <tt>\b 0x100:</tt> SIR FSTAT Register */
9395 __I uint32_t sfstat ; /**< <tt>\b 0x104:</tt> SIR SFSTAT Register */
9496} mxc_sir_regs_t ;
@@ -102,6 +104,7 @@ typedef struct {
102104 */
103105#define MXC_R_SIR_SISTAT ((uint32_t)0x00000000UL) /**< Offset from SIR Base Address: <tt> 0x0000</tt> */
104106#define MXC_R_SIR_SIADDR ((uint32_t)0x00000004UL) /**< Offset from SIR Base Address: <tt> 0x0004</tt> */
107+ #define MXC_R_SIR_BTLE_LDO_TRIM ((uint32_t)0x00000028UL) /**< Offset from SIR Base Address: <tt> 0x0028</tt> */
105108#define MXC_R_SIR_FSTAT ((uint32_t)0x00000100UL) /**< Offset from SIR Base Address: <tt> 0x0100</tt> */
106109#define MXC_R_SIR_SFSTAT ((uint32_t)0x00000104UL) /**< Offset from SIR Base Address: <tt> 0x0104</tt> */
107110/**@} end of group sir_registers */
@@ -133,6 +136,20 @@ typedef struct {
133136
134137/**@} end of group SIR_SIADDR_Register */
135138
139+ /**
140+ * @ingroup sir_registers
141+ * @defgroup SIR_BTLE_LDO_TRIM SIR_BTLE_LDO_TRIM
142+ * @brief BTLE LDO Trim register.
143+ * @{
144+ */
145+ #define MXC_F_SIR_BTLE_LDO_TRIM_TX_POS 0 /**< BTLE_LDO_TRIM_TX Position */
146+ #define MXC_F_SIR_BTLE_LDO_TRIM_TX ((uint32_t)(0x1FUL << MXC_F_SIR_BTLE_LDO_TRIM_TX_POS)) /**< BTLE_LDO_TRIM_TX Mask */
147+
148+ #define MXC_F_SIR_BTLE_LDO_TRIM_RX_POS 5 /**< BTLE_LDO_TRIM_RX Position */
149+ #define MXC_F_SIR_BTLE_LDO_TRIM_RX ((uint32_t)(0x1FUL << MXC_F_SIR_BTLE_LDO_TRIM_RX_POS)) /**< BTLE_LDO_TRIM_RX Mask */
150+
151+ /**@} end of group SIR_BTLE_LDO_TRIM_Register */
152+
136153/**
137154 * @ingroup sir_registers
138155 * @defgroup SIR_FSTAT SIR_FSTAT
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