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kevin-gillespiesihyung-maxim
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Adding enumeration for btleldoctrl register. (#390)
* Adding enumeration for btleldoctrl register. * Adding new bit fields. * Moving bit fields. Adding trim register. * Fixing bit offset for LDORXVSEL. * Fixing copyright year. * Adding SIR BTLE LDO trim register. * ME17: Added deprecated attributes into SVD file. * ME17: Removed field definitions from max32655.h. * ME20: Resolving dependent SVD file changes. * AI85/ME20: Resolved dependent SVD file changes. --------- Co-authored-by: Kevin Gillespie <[email protected]> Co-authored-by: Sihyung Woo <[email protected]> MSDK-Commit: 0eb794ddc2b799e1ffb614283d10abe578a567ed
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‎MAX/Libraries/CMSIS/Device/Maxim/MAX32655/Include/gcr_regs.h‎

Lines changed: 23 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@
55
*/
66

77
/******************************************************************************
8-
* Copyright (C) 2022 Maxim Integrated Products, Inc., All Rights Reserved.
8+
* Copyright (C) 2023 Maxim Integrated Products, Inc., All Rights Reserved.
99
*
1010
* Permission is hereby granted, free of charge, to any person obtaining a
1111
* copy of this software and associated documentation files (the "Software"),
@@ -699,6 +699,17 @@ typedef struct {
699699
#define MXC_F_GCR_BTLELDOCTRL_LDOTXPULLD_POS 1 /**< BTLELDOCTRL_LDOTXPULLD Position */
700700
#define MXC_F_GCR_BTLELDOCTRL_LDOTXPULLD ((uint32_t)(0x1UL << MXC_F_GCR_BTLELDOCTRL_LDOTXPULLD_POS)) /**< BTLELDOCTRL_LDOTXPULLD Mask */
701701

702+
#define MXC_F_GCR_BTLELDOCTRL_LDOTXVSEL_POS 2 /**< BTLELDOCTRL_LDOTXVSEL Position */
703+
#define MXC_F_GCR_BTLELDOCTRL_LDOTXVSEL ((uint32_t)(0x3UL << MXC_F_GCR_BTLELDOCTRL_LDOTXVSEL_POS)) /**< BTLELDOCTRL_LDOTXVSEL Mask */
704+
#define MXC_V_GCR_BTLELDOCTRL_LDOTXVSEL_0_7 ((uint32_t)0x0UL) /**< BTLELDOCTRL_LDOTXVSEL_0_7 Value */
705+
#define MXC_S_GCR_BTLELDOCTRL_LDOTXVSEL_0_7 (MXC_V_GCR_BTLELDOCTRL_LDOTXVSEL_0_7 << MXC_F_GCR_BTLELDOCTRL_LDOTXVSEL_POS) /**< BTLELDOCTRL_LDOTXVSEL_0_7 Setting */
706+
#define MXC_V_GCR_BTLELDOCTRL_LDOTXVSEL_0_85 ((uint32_t)0x1UL) /**< BTLELDOCTRL_LDOTXVSEL_0_85 Value */
707+
#define MXC_S_GCR_BTLELDOCTRL_LDOTXVSEL_0_85 (MXC_V_GCR_BTLELDOCTRL_LDOTXVSEL_0_85 << MXC_F_GCR_BTLELDOCTRL_LDOTXVSEL_POS) /**< BTLELDOCTRL_LDOTXVSEL_0_85 Setting */
708+
#define MXC_V_GCR_BTLELDOCTRL_LDOTXVSEL_0_9 ((uint32_t)0x2UL) /**< BTLELDOCTRL_LDOTXVSEL_0_9 Value */
709+
#define MXC_S_GCR_BTLELDOCTRL_LDOTXVSEL_0_9 (MXC_V_GCR_BTLELDOCTRL_LDOTXVSEL_0_9 << MXC_F_GCR_BTLELDOCTRL_LDOTXVSEL_POS) /**< BTLELDOCTRL_LDOTXVSEL_0_9 Setting */
710+
#define MXC_V_GCR_BTLELDOCTRL_LDOTXVSEL_1_1 ((uint32_t)0x3UL) /**< BTLELDOCTRL_LDOTXVSEL_1_1 Value */
711+
#define MXC_S_GCR_BTLELDOCTRL_LDOTXVSEL_1_1 (MXC_V_GCR_BTLELDOCTRL_LDOTXVSEL_1_1 << MXC_F_GCR_BTLELDOCTRL_LDOTXVSEL_POS) /**< BTLELDOCTRL_LDOTXVSEL_1_1 Setting */
712+
702713
#define MXC_F_GCR_BTLELDOCTRL_LDOTXVSEL0_POS 2 /**< BTLELDOCTRL_LDOTXVSEL0 Position */
703714
#define MXC_F_GCR_BTLELDOCTRL_LDOTXVSEL0 ((uint32_t)(0x1UL << MXC_F_GCR_BTLELDOCTRL_LDOTXVSEL0_POS)) /**< BTLELDOCTRL_LDOTXVSEL0 Mask */
704715

@@ -711,6 +722,17 @@ typedef struct {
711722
#define MXC_F_GCR_BTLELDOCTRL_LDORXPULLD_POS 5 /**< BTLELDOCTRL_LDORXPULLD Position */
712723
#define MXC_F_GCR_BTLELDOCTRL_LDORXPULLD ((uint32_t)(0x1UL << MXC_F_GCR_BTLELDOCTRL_LDORXPULLD_POS)) /**< BTLELDOCTRL_LDORXPULLD Mask */
713724

725+
#define MXC_F_GCR_BTLELDOCTRL_LDORXVSEL_POS 6 /**< BTLELDOCTRL_LDORXVSEL Position */
726+
#define MXC_F_GCR_BTLELDOCTRL_LDORXVSEL ((uint32_t)(0x3UL << MXC_F_GCR_BTLELDOCTRL_LDORXVSEL_POS)) /**< BTLELDOCTRL_LDORXVSEL Mask */
727+
#define MXC_V_GCR_BTLELDOCTRL_LDORXVSEL_0_7 ((uint32_t)0x0UL) /**< BTLELDOCTRL_LDORXVSEL_0_7 Value */
728+
#define MXC_S_GCR_BTLELDOCTRL_LDORXVSEL_0_7 (MXC_V_GCR_BTLELDOCTRL_LDORXVSEL_0_7 << MXC_F_GCR_BTLELDOCTRL_LDORXVSEL_POS) /**< BTLELDOCTRL_LDORXVSEL_0_7 Setting */
729+
#define MXC_V_GCR_BTLELDOCTRL_LDORXVSEL_0_85 ((uint32_t)0x1UL) /**< BTLELDOCTRL_LDORXVSEL_0_85 Value */
730+
#define MXC_S_GCR_BTLELDOCTRL_LDORXVSEL_0_85 (MXC_V_GCR_BTLELDOCTRL_LDORXVSEL_0_85 << MXC_F_GCR_BTLELDOCTRL_LDORXVSEL_POS) /**< BTLELDOCTRL_LDORXVSEL_0_85 Setting */
731+
#define MXC_V_GCR_BTLELDOCTRL_LDORXVSEL_0_9 ((uint32_t)0x2UL) /**< BTLELDOCTRL_LDORXVSEL_0_9 Value */
732+
#define MXC_S_GCR_BTLELDOCTRL_LDORXVSEL_0_9 (MXC_V_GCR_BTLELDOCTRL_LDORXVSEL_0_9 << MXC_F_GCR_BTLELDOCTRL_LDORXVSEL_POS) /**< BTLELDOCTRL_LDORXVSEL_0_9 Setting */
733+
#define MXC_V_GCR_BTLELDOCTRL_LDORXVSEL_1_1 ((uint32_t)0x3UL) /**< BTLELDOCTRL_LDORXVSEL_1_1 Value */
734+
#define MXC_S_GCR_BTLELDOCTRL_LDORXVSEL_1_1 (MXC_V_GCR_BTLELDOCTRL_LDORXVSEL_1_1 << MXC_F_GCR_BTLELDOCTRL_LDORXVSEL_POS) /**< BTLELDOCTRL_LDORXVSEL_1_1 Setting */
735+
714736
#define MXC_F_GCR_BTLELDOCTRL_LDORXVSEL0_POS 6 /**< BTLELDOCTRL_LDORXVSEL0 Position */
715737
#define MXC_F_GCR_BTLELDOCTRL_LDORXVSEL0 ((uint32_t)(0x1UL << MXC_F_GCR_BTLELDOCTRL_LDORXVSEL0_POS)) /**< BTLELDOCTRL_LDORXVSEL0 Mask */
716738

‎MAX/Libraries/CMSIS/Device/Maxim/MAX32655/Include/sir_regs.h‎

Lines changed: 19 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@
55
*/
66

77
/******************************************************************************
8-
* Copyright (C) 2022 Maxim Integrated Products, Inc., All Rights Reserved.
8+
* Copyright (C) 2023 Maxim Integrated Products, Inc., All Rights Reserved.
99
*
1010
* Permission is hereby granted, free of charge, to any person obtaining a
1111
* copy of this software and associated documentation files (the "Software"),
@@ -88,7 +88,9 @@ extern "C" {
8888
typedef struct {
8989
__I uint32_t sistat; /**< <tt>\b 0x00:</tt> SIR SISTAT Register */
9090
__I uint32_t addr; /**< <tt>\b 0x04:</tt> SIR ADDR Register */
91-
__R uint32_t rsv_0x8_0xff[62];
91+
__R uint32_t rsv_0x8_0x47[16];
92+
__IO uint32_t btle_ldo_trim; /**< <tt>\b 0x48:</tt> SIR BTLE_LDO_TRIM Register */
93+
__R uint32_t rsv_0x4c_0xff[45];
9294
__I uint32_t fstat; /**< <tt>\b 0x100:</tt> SIR FSTAT Register */
9395
__I uint32_t sfstat; /**< <tt>\b 0x104:</tt> SIR SFSTAT Register */
9496
} mxc_sir_regs_t;
@@ -102,6 +104,7 @@ typedef struct {
102104
*/
103105
#define MXC_R_SIR_SISTAT ((uint32_t)0x00000000UL) /**< Offset from SIR Base Address: <tt> 0x0000</tt> */
104106
#define MXC_R_SIR_ADDR ((uint32_t)0x00000004UL) /**< Offset from SIR Base Address: <tt> 0x0004</tt> */
107+
#define MXC_R_SIR_BTLE_LDO_TRIM ((uint32_t)0x00000048UL) /**< Offset from SIR Base Address: <tt> 0x0048</tt> */
105108
#define MXC_R_SIR_FSTAT ((uint32_t)0x00000100UL) /**< Offset from SIR Base Address: <tt> 0x0100</tt> */
106109
#define MXC_R_SIR_SFSTAT ((uint32_t)0x00000104UL) /**< Offset from SIR Base Address: <tt> 0x0104</tt> */
107110
/**@} end of group sir_registers */
@@ -133,6 +136,20 @@ typedef struct {
133136

134137
/**@} end of group SIR_ADDR_Register */
135138

139+
/**
140+
* @ingroup sir_registers
141+
* @defgroup SIR_BTLE_LDO_TRIM SIR_BTLE_LDO_TRIM
142+
* @brief BTLE LDO Trim register.
143+
* @{
144+
*/
145+
#define MXC_F_SIR_BTLE_LDO_TRIM_TX_POS 0 /**< BTLE_LDO_TRIM_TX Position */
146+
#define MXC_F_SIR_BTLE_LDO_TRIM_TX ((uint32_t)(0x1FUL << MXC_F_SIR_BTLE_LDO_TRIM_TX_POS)) /**< BTLE_LDO_TRIM_TX Mask */
147+
148+
#define MXC_F_SIR_BTLE_LDO_TRIM_RX_POS 8 /**< BTLE_LDO_TRIM_RX Position */
149+
#define MXC_F_SIR_BTLE_LDO_TRIM_RX ((uint32_t)(0x1FUL << MXC_F_SIR_BTLE_LDO_TRIM_RX_POS)) /**< BTLE_LDO_TRIM_RX Mask */
150+
151+
/**@} end of group SIR_BTLE_LDO_TRIM_Register */
152+
136153
/**
137154
* @ingroup sir_registers
138155
* @defgroup SIR_FSTAT SIR_FSTAT

‎MAX/Libraries/CMSIS/Device/Maxim/MAX32680/Include/gcr_regs.h‎

Lines changed: 23 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@
55
*/
66

77
/******************************************************************************
8-
* Copyright (C) 2022 Maxim Integrated Products, Inc., All Rights Reserved.
8+
* Copyright (C) 2023 Maxim Integrated Products, Inc., All Rights Reserved.
99
*
1010
* Permission is hereby granted, free of charge, to any person obtaining a
1111
* copy of this software and associated documentation files (the "Software"),
@@ -699,6 +699,17 @@ typedef struct {
699699
#define MXC_F_GCR_BTLELDOCTRL_LDOTXPULLD_POS 1 /**< BTLELDOCTRL_LDOTXPULLD Position */
700700
#define MXC_F_GCR_BTLELDOCTRL_LDOTXPULLD ((uint32_t)(0x1UL << MXC_F_GCR_BTLELDOCTRL_LDOTXPULLD_POS)) /**< BTLELDOCTRL_LDOTXPULLD Mask */
701701

702+
#define MXC_F_GCR_BTLELDOCTRL_LDOTXVSEL_POS 2 /**< BTLELDOCTRL_LDOTXVSEL Position */
703+
#define MXC_F_GCR_BTLELDOCTRL_LDOTXVSEL ((uint32_t)(0x3UL << MXC_F_GCR_BTLELDOCTRL_LDOTXVSEL_POS)) /**< BTLELDOCTRL_LDOTXVSEL Mask */
704+
#define MXC_V_GCR_BTLELDOCTRL_LDOTXVSEL_0_7 ((uint32_t)0x0UL) /**< BTLELDOCTRL_LDOTXVSEL_0_7 Value */
705+
#define MXC_S_GCR_BTLELDOCTRL_LDOTXVSEL_0_7 (MXC_V_GCR_BTLELDOCTRL_LDOTXVSEL_0_7 << MXC_F_GCR_BTLELDOCTRL_LDOTXVSEL_POS) /**< BTLELDOCTRL_LDOTXVSEL_0_7 Setting */
706+
#define MXC_V_GCR_BTLELDOCTRL_LDOTXVSEL_0_85 ((uint32_t)0x1UL) /**< BTLELDOCTRL_LDOTXVSEL_0_85 Value */
707+
#define MXC_S_GCR_BTLELDOCTRL_LDOTXVSEL_0_85 (MXC_V_GCR_BTLELDOCTRL_LDOTXVSEL_0_85 << MXC_F_GCR_BTLELDOCTRL_LDOTXVSEL_POS) /**< BTLELDOCTRL_LDOTXVSEL_0_85 Setting */
708+
#define MXC_V_GCR_BTLELDOCTRL_LDOTXVSEL_0_9 ((uint32_t)0x2UL) /**< BTLELDOCTRL_LDOTXVSEL_0_9 Value */
709+
#define MXC_S_GCR_BTLELDOCTRL_LDOTXVSEL_0_9 (MXC_V_GCR_BTLELDOCTRL_LDOTXVSEL_0_9 << MXC_F_GCR_BTLELDOCTRL_LDOTXVSEL_POS) /**< BTLELDOCTRL_LDOTXVSEL_0_9 Setting */
710+
#define MXC_V_GCR_BTLELDOCTRL_LDOTXVSEL_1_1 ((uint32_t)0x3UL) /**< BTLELDOCTRL_LDOTXVSEL_1_1 Value */
711+
#define MXC_S_GCR_BTLELDOCTRL_LDOTXVSEL_1_1 (MXC_V_GCR_BTLELDOCTRL_LDOTXVSEL_1_1 << MXC_F_GCR_BTLELDOCTRL_LDOTXVSEL_POS) /**< BTLELDOCTRL_LDOTXVSEL_1_1 Setting */
712+
702713
#define MXC_F_GCR_BTLELDOCTRL_LDOTXVSEL0_POS 2 /**< BTLELDOCTRL_LDOTXVSEL0 Position */
703714
#define MXC_F_GCR_BTLELDOCTRL_LDOTXVSEL0 ((uint32_t)(0x1UL << MXC_F_GCR_BTLELDOCTRL_LDOTXVSEL0_POS)) /**< BTLELDOCTRL_LDOTXVSEL0 Mask */
704715

@@ -711,6 +722,17 @@ typedef struct {
711722
#define MXC_F_GCR_BTLELDOCTRL_LDORXPULLD_POS 5 /**< BTLELDOCTRL_LDORXPULLD Position */
712723
#define MXC_F_GCR_BTLELDOCTRL_LDORXPULLD ((uint32_t)(0x1UL << MXC_F_GCR_BTLELDOCTRL_LDORXPULLD_POS)) /**< BTLELDOCTRL_LDORXPULLD Mask */
713724

725+
#define MXC_F_GCR_BTLELDOCTRL_LDORXVSEL_POS 6 /**< BTLELDOCTRL_LDORXVSEL Position */
726+
#define MXC_F_GCR_BTLELDOCTRL_LDORXVSEL ((uint32_t)(0x3UL << MXC_F_GCR_BTLELDOCTRL_LDORXVSEL_POS)) /**< BTLELDOCTRL_LDORXVSEL Mask */
727+
#define MXC_V_GCR_BTLELDOCTRL_LDORXVSEL_0_7 ((uint32_t)0x0UL) /**< BTLELDOCTRL_LDORXVSEL_0_7 Value */
728+
#define MXC_S_GCR_BTLELDOCTRL_LDORXVSEL_0_7 (MXC_V_GCR_BTLELDOCTRL_LDORXVSEL_0_7 << MXC_F_GCR_BTLELDOCTRL_LDORXVSEL_POS) /**< BTLELDOCTRL_LDORXVSEL_0_7 Setting */
729+
#define MXC_V_GCR_BTLELDOCTRL_LDORXVSEL_0_85 ((uint32_t)0x1UL) /**< BTLELDOCTRL_LDORXVSEL_0_85 Value */
730+
#define MXC_S_GCR_BTLELDOCTRL_LDORXVSEL_0_85 (MXC_V_GCR_BTLELDOCTRL_LDORXVSEL_0_85 << MXC_F_GCR_BTLELDOCTRL_LDORXVSEL_POS) /**< BTLELDOCTRL_LDORXVSEL_0_85 Setting */
731+
#define MXC_V_GCR_BTLELDOCTRL_LDORXVSEL_0_9 ((uint32_t)0x2UL) /**< BTLELDOCTRL_LDORXVSEL_0_9 Value */
732+
#define MXC_S_GCR_BTLELDOCTRL_LDORXVSEL_0_9 (MXC_V_GCR_BTLELDOCTRL_LDORXVSEL_0_9 << MXC_F_GCR_BTLELDOCTRL_LDORXVSEL_POS) /**< BTLELDOCTRL_LDORXVSEL_0_9 Setting */
733+
#define MXC_V_GCR_BTLELDOCTRL_LDORXVSEL_1_1 ((uint32_t)0x3UL) /**< BTLELDOCTRL_LDORXVSEL_1_1 Value */
734+
#define MXC_S_GCR_BTLELDOCTRL_LDORXVSEL_1_1 (MXC_V_GCR_BTLELDOCTRL_LDORXVSEL_1_1 << MXC_F_GCR_BTLELDOCTRL_LDORXVSEL_POS) /**< BTLELDOCTRL_LDORXVSEL_1_1 Setting */
735+
714736
#define MXC_F_GCR_BTLELDOCTRL_LDORXVSEL0_POS 6 /**< BTLELDOCTRL_LDORXVSEL0 Position */
715737
#define MXC_F_GCR_BTLELDOCTRL_LDORXVSEL0 ((uint32_t)(0x1UL << MXC_F_GCR_BTLELDOCTRL_LDORXVSEL0_POS)) /**< BTLELDOCTRL_LDORXVSEL0 Mask */
716738

‎MAX/Libraries/CMSIS/Device/Maxim/MAX32680/Include/sir_regs.h‎

Lines changed: 19 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@
55
*/
66

77
/******************************************************************************
8-
* Copyright (C) 2022 Maxim Integrated Products, Inc., All Rights Reserved.
8+
* Copyright (C) 2023 Maxim Integrated Products, Inc., All Rights Reserved.
99
*
1010
* Permission is hereby granted, free of charge, to any person obtaining a
1111
* copy of this software and associated documentation files (the "Software"),
@@ -88,7 +88,9 @@ extern "C" {
8888
typedef struct {
8989
__I uint32_t sistat; /**< <tt>\b 0x00:</tt> SIR SISTAT Register */
9090
__I uint32_t addr; /**< <tt>\b 0x04:</tt> SIR ADDR Register */
91-
__R uint32_t rsv_0x8_0xff[62];
91+
__R uint32_t rsv_0x8_0x47[16];
92+
__IO uint32_t btle_ldo_trim; /**< <tt>\b 0x48:</tt> SIR BTLE_LDO_TRIM Register */
93+
__R uint32_t rsv_0x4c_0xff[45];
9294
__I uint32_t fstat; /**< <tt>\b 0x100:</tt> SIR FSTAT Register */
9395
__I uint32_t sfstat; /**< <tt>\b 0x104:</tt> SIR SFSTAT Register */
9496
} mxc_sir_regs_t;
@@ -102,6 +104,7 @@ typedef struct {
102104
*/
103105
#define MXC_R_SIR_SISTAT ((uint32_t)0x00000000UL) /**< Offset from SIR Base Address: <tt> 0x0000</tt> */
104106
#define MXC_R_SIR_ADDR ((uint32_t)0x00000004UL) /**< Offset from SIR Base Address: <tt> 0x0004</tt> */
107+
#define MXC_R_SIR_BTLE_LDO_TRIM ((uint32_t)0x00000048UL) /**< Offset from SIR Base Address: <tt> 0x0048</tt> */
105108
#define MXC_R_SIR_FSTAT ((uint32_t)0x00000100UL) /**< Offset from SIR Base Address: <tt> 0x0100</tt> */
106109
#define MXC_R_SIR_SFSTAT ((uint32_t)0x00000104UL) /**< Offset from SIR Base Address: <tt> 0x0104</tt> */
107110
/**@} end of group sir_registers */
@@ -133,6 +136,20 @@ typedef struct {
133136

134137
/**@} end of group SIR_ADDR_Register */
135138

139+
/**
140+
* @ingroup sir_registers
141+
* @defgroup SIR_BTLE_LDO_TRIM SIR_BTLE_LDO_TRIM
142+
* @brief BTLE LDO Trim register.
143+
* @{
144+
*/
145+
#define MXC_F_SIR_BTLE_LDO_TRIM_TX_POS 0 /**< BTLE_LDO_TRIM_TX Position */
146+
#define MXC_F_SIR_BTLE_LDO_TRIM_TX ((uint32_t)(0x1FUL << MXC_F_SIR_BTLE_LDO_TRIM_TX_POS)) /**< BTLE_LDO_TRIM_TX Mask */
147+
148+
#define MXC_F_SIR_BTLE_LDO_TRIM_RX_POS 8 /**< BTLE_LDO_TRIM_RX Position */
149+
#define MXC_F_SIR_BTLE_LDO_TRIM_RX ((uint32_t)(0x1FUL << MXC_F_SIR_BTLE_LDO_TRIM_RX_POS)) /**< BTLE_LDO_TRIM_RX Mask */
150+
151+
/**@} end of group SIR_BTLE_LDO_TRIM_Register */
152+
136153
/**
137154
* @ingroup sir_registers
138155
* @defgroup SIR_FSTAT SIR_FSTAT

‎MAX/Libraries/CMSIS/Device/Maxim/MAX78000/Include/sir_regs.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@
55
*/
66

77
/******************************************************************************
8-
* Copyright (C) 2022 Maxim Integrated Products, Inc., All Rights Reserved.
8+
* Copyright (C) 2023 Maxim Integrated Products, Inc., All Rights Reserved.
99
*
1010
* Permission is hereby granted, free of charge, to any person obtaining a
1111
* copy of this software and associated documentation files (the "Software"),

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