Skip to content

Commit b88c2ca

Browse files
Jacob-Scheifflerpetejohanson-adi
Jacob-Scheiffler
authored and
petejohanson-adi
committed
MSDK-1013: Adding ME18 GPIO4 support. (#343)
* MSDK-1013: Adding ME18 GPIO4 support. * MSDK-1013: Resolving clang-format errors. --------- Co-authored-by: Scheiffler <[email protected]> MSDK-Commit: c08bf274303ac9382b81eddd15c56eb4fc1b0081
1 parent 4df0112 commit b88c2ca

File tree

1 file changed

+196
-38
lines changed

1 file changed

+196
-38
lines changed

‎MAX/Libraries/PeriphDrivers/Source/GPIO/gpio_me18.c‎

Lines changed: 196 additions & 38 deletions
Original file line numberDiff line numberDiff line change
@@ -36,15 +36,40 @@
3636

3737
/* **** Includes **** */
3838
#include <stddef.h>
39-
#include "mxc_device.h"
40-
#include "mxc_assert.h"
4139
#include "gpio.h"
42-
#include "gpio_reva.h"
4340
#include "gpio_common.h"
41+
#include "gpio_reva.h"
42+
// #include "lpgcr_regs.h"
43+
#include "mcr_regs.h"
44+
#include "mxc_device.h"
4445
#include "mxc_sys.h"
45-
#include "lpgcr_regs.h"
46+
#include "pwrseq_regs.h"
4647

4748
/* **** Definitions **** */
49+
#define GPIO4_PIN_MASK 0x00000003
50+
#define GPIO4_RESET_MASK 0xFFFFFF77
51+
#define GPIO4_OUTEN_MASK(mask) \
52+
(((mask & MXC_GPIO_PIN_0) << MXC_F_MCR_GPIO4_CTRL_P40_OE_POS) | \
53+
((mask & MXC_GPIO_PIN_1) << (MXC_F_MCR_GPIO4_CTRL_P41_OE_POS - 1)))
54+
#define GPIO4_PULLDIS_MASK(mask) \
55+
(((mask & MXC_GPIO_PIN_0) << MXC_F_MCR_GPIO4_CTRL_P40_PE_POS) | \
56+
((mask & MXC_GPIO_PIN_1) << (MXC_F_MCR_GPIO4_CTRL_P41_PE_POS - 1)))
57+
#define GPIO4_DATAOUT_MASK(mask) \
58+
(((mask & MXC_GPIO_PIN_0) << MXC_F_MCR_GPIO4_CTRL_P40_DO_POS) | \
59+
((mask & MXC_GPIO_PIN_1) << (MXC_F_MCR_GPIO4_CTRL_P41_DO_POS - 1)))
60+
#define GPIO4_DATAOUT_GET_MASK(mask) \
61+
((((MXC_MCR->gpio4_ctrl & MXC_F_MCR_GPIO4_CTRL_P40_DO) >> MXC_F_MCR_GPIO4_CTRL_P40_DO_POS) | \
62+
((MXC_MCR->gpio4_ctrl & MXC_F_MCR_GPIO4_CTRL_P41_DO) >> \
63+
(MXC_F_MCR_GPIO4_CTRL_P41_DO_POS - 1))) & \
64+
mask)
65+
#define GPIO4_DATAIN_MASK(mask) \
66+
((((MXC_MCR->gpio4_ctrl & MXC_F_MCR_GPIO4_CTRL_P40_IN) >> MXC_F_MCR_GPIO4_CTRL_P40_IN_POS) | \
67+
((MXC_MCR->gpio4_ctrl & MXC_F_MCR_GPIO4_CTRL_P41_IN) >> \
68+
(MXC_F_MCR_GPIO4_CTRL_P41_IN_POS - 1))) & \
69+
mask)
70+
#define GPIO4_AFEN_MASK(mask) \
71+
(((mask & MXC_GPIO_PIN_0) << MXC_F_MCR_OUTEN_PDOWN_OUT_EN_POS) | \
72+
((mask & MXC_GPIO_PIN_1) >> (MXC_F_MCR_OUTEN_SQWOUT_EN_POS + 1)))
4873

4974
/* **** Globals **** */
5075

@@ -109,6 +134,10 @@ int MXC_GPIO_Reset(uint32_t portmask)
109134
MXC_SYS_Reset_Periph(MXC_SYS_RESET_GPIO3);
110135
}
111136

137+
if (portmask & 0x10) {
138+
MXC_MCR->gpio4_ctrl &= ~GPIO4_RESET_MASK;
139+
}
140+
112141
return E_NO_ERROR;
113142
}
114143

@@ -118,105 +147,218 @@ int MXC_GPIO_Config(const mxc_gpio_cfg_t *cfg)
118147
mxc_gpio_regs_t *gpio = cfg->port;
119148

120149
port = MXC_GPIO_GET_IDX(cfg->port);
150+
if (port == -1) {
151+
return E_BAD_PARAM;
152+
}
153+
154+
// Initialize callback function pointers
121155
MXC_GPIO_Init(1 << port);
122156

123157
// Configure alternate function
124-
error = MXC_GPIO_RevA_SetAF((mxc_gpio_reva_regs_t *)gpio, cfg->func, cfg->mask);
158+
if (port < 4) {
159+
error = MXC_GPIO_RevA_SetAF((mxc_gpio_reva_regs_t *)gpio, cfg->func, cfg->mask);
160+
} else {
161+
error = E_NO_ERROR;
162+
163+
switch (cfg->func) {
164+
case MXC_GPIO_FUNC_ALT1:
165+
// Set GPIO(s) to AF1
166+
MXC_MCR->gpio4_ctrl |= GPIO4_OUTEN_MASK(cfg->mask);
167+
MXC_MCR->outen |= GPIO4_AFEN_MASK(cfg->mask);
168+
break;
169+
170+
case MXC_GPIO_FUNC_OUT:
171+
// Set GPIO(s) to output mode
172+
MXC_MCR->gpio4_ctrl |= GPIO4_OUTEN_MASK(cfg->mask);
173+
MXC_MCR->outen &= ~GPIO4_AFEN_MASK(cfg->mask);
174+
break;
175+
176+
case MXC_GPIO_FUNC_IN:
177+
// Set GPIO(s) to input mode
178+
MXC_MCR->gpio4_ctrl &= ~GPIO4_OUTEN_MASK(cfg->mask);
179+
MXC_MCR->outen &= ~GPIO4_AFEN_MASK(cfg->mask);
180+
break;
181+
182+
default:
183+
error = E_NOT_SUPPORTED;
184+
break;
185+
}
186+
}
125187

126188
if (error != E_NO_ERROR) {
127189
return error;
128190
}
129191

130192
// Configure the pad
131-
switch (cfg->pad) {
132-
case MXC_GPIO_PAD_NONE:
133-
gpio->padctrl0 &= ~cfg->mask;
134-
gpio->padctrl1 &= ~cfg->mask;
135-
break;
136-
137-
case MXC_GPIO_PAD_WEAK_PULL_UP:
138-
gpio->padctrl0 |= cfg->mask;
139-
gpio->padctrl1 &= ~cfg->mask;
140-
gpio->ps &= ~cfg->mask;
141-
break;
142-
143-
case MXC_GPIO_PAD_PULL_UP:
144-
gpio->padctrl0 |= cfg->mask;
145-
gpio->padctrl1 &= ~cfg->mask;
146-
gpio->ps |= cfg->mask;
147-
break;
148-
149-
case MXC_GPIO_PAD_WEAK_PULL_DOWN:
150-
gpio->padctrl0 &= ~cfg->mask;
151-
gpio->padctrl1 |= cfg->mask;
152-
gpio->ps &= ~cfg->mask;
153-
break;
154-
155-
case MXC_GPIO_PAD_PULL_DOWN:
156-
gpio->padctrl0 &= ~cfg->mask;
157-
gpio->padctrl1 |= cfg->mask;
158-
gpio->ps |= cfg->mask;
159-
break;
160-
161-
default:
162-
return E_BAD_PARAM;
193+
if (port < 4) {
194+
switch (cfg->pad) {
195+
case MXC_GPIO_PAD_NONE:
196+
gpio->padctrl0 &= ~cfg->mask;
197+
gpio->padctrl1 &= ~cfg->mask;
198+
break;
199+
200+
case MXC_GPIO_PAD_WEAK_PULL_UP:
201+
gpio->padctrl0 |= cfg->mask;
202+
gpio->padctrl1 &= ~cfg->mask;
203+
gpio->ps &= ~cfg->mask;
204+
break;
205+
206+
case MXC_GPIO_PAD_PULL_UP:
207+
gpio->padctrl0 |= cfg->mask;
208+
gpio->padctrl1 &= ~cfg->mask;
209+
gpio->ps |= cfg->mask;
210+
break;
211+
212+
case MXC_GPIO_PAD_WEAK_PULL_DOWN:
213+
gpio->padctrl0 &= ~cfg->mask;
214+
gpio->padctrl1 |= cfg->mask;
215+
gpio->ps &= ~cfg->mask;
216+
break;
217+
218+
case MXC_GPIO_PAD_PULL_DOWN:
219+
gpio->padctrl0 &= ~cfg->mask;
220+
gpio->padctrl1 |= cfg->mask;
221+
gpio->ps |= cfg->mask;
222+
break;
223+
224+
default:
225+
return E_BAD_PARAM;
226+
}
227+
} else {
228+
switch (cfg->pad) {
229+
case MXC_GPIO_PAD_NONE:
230+
// Disable pull-up/down resistors
231+
MXC_MCR->gpio4_ctrl |= GPIO4_PULLDIS_MASK(cfg->mask);
232+
break;
233+
234+
case MXC_GPIO_PAD_WEAK_PULL_UP:
235+
case MXC_GPIO_PAD_PULL_UP:
236+
// Set to input mode, enable pull-up/down resistors
237+
MXC_MCR->gpio4_ctrl &= ~(GPIO4_OUTEN_MASK(cfg->mask) | GPIO4_PULLDIS_MASK(cfg->mask));
238+
239+
// Set to pullup mode
240+
MXC_MCR->gpio4_ctrl |= GPIO4_DATAOUT_MASK(cfg->mask);
241+
break;
242+
243+
case MXC_GPIO_PAD_WEAK_PULL_DOWN:
244+
case MXC_GPIO_PAD_PULL_DOWN:
245+
// Set to input mode, enable pull-up/down resistors, set to pulldown mode
246+
MXC_MCR->gpio4_ctrl &= ~(GPIO4_OUTEN_MASK(cfg->mask) | GPIO4_PULLDIS_MASK(cfg->mask) |
247+
GPIO4_DATAOUT_MASK(cfg->mask));
248+
break;
249+
250+
default:
251+
return E_BAD_PARAM;
252+
}
163253
}
164254

165255
// Configure the vssel
166-
return MXC_GPIO_SetVSSEL(gpio, cfg->vssel, cfg->mask);
256+
if (port < 4) {
257+
return MXC_GPIO_SetVSSEL(gpio, cfg->vssel, cfg->mask);
258+
}
259+
260+
return E_NO_ERROR;
167261
}
168262

169263
/* ************************************************************************** */
170264
uint32_t MXC_GPIO_InGet(mxc_gpio_regs_t *port, uint32_t mask)
171265
{
266+
if (port == MXC_GPIO4) {
267+
return GPIO4_DATAIN_MASK(mask);
268+
}
269+
172270
return MXC_GPIO_RevA_InGet((mxc_gpio_reva_regs_t *)port, mask);
173271
}
174272

175273
/* ************************************************************************** */
176274
void MXC_GPIO_OutSet(mxc_gpio_regs_t *port, uint32_t mask)
177275
{
276+
if (port == MXC_GPIO4) {
277+
MXC_MCR->gpio4_ctrl |= GPIO4_DATAOUT_MASK(mask);
278+
return;
279+
}
280+
178281
MXC_GPIO_RevA_OutSet((mxc_gpio_reva_regs_t *)port, mask);
179282
}
180283

181284
/* ************************************************************************** */
182285
void MXC_GPIO_OutClr(mxc_gpio_regs_t *port, uint32_t mask)
183286
{
287+
if (port == MXC_GPIO4) {
288+
MXC_MCR->gpio4_ctrl &= ~GPIO4_DATAOUT_MASK(mask);
289+
return;
290+
}
291+
184292
MXC_GPIO_RevA_OutClr((mxc_gpio_reva_regs_t *)port, mask);
185293
}
186294

187295
/* ************************************************************************** */
188296
uint32_t MXC_GPIO_OutGet(mxc_gpio_regs_t *port, uint32_t mask)
189297
{
298+
if (port == MXC_GPIO4) {
299+
return GPIO4_DATAOUT_GET_MASK(mask);
300+
}
301+
190302
return MXC_GPIO_RevA_OutGet((mxc_gpio_reva_regs_t *)port, mask);
191303
}
192304

193305
/* ************************************************************************** */
194306
void MXC_GPIO_OutPut(mxc_gpio_regs_t *port, uint32_t mask, uint32_t val)
195307
{
308+
if (port == MXC_GPIO4) {
309+
uint32_t gpio4_cp = MXC_MCR->gpio4_ctrl;
310+
311+
MXC_MCR->gpio4_ctrl = (gpio4_cp & ~mask) | GPIO4_DATAOUT_MASK((mask & val));
312+
return;
313+
}
314+
196315
MXC_GPIO_RevA_OutPut((mxc_gpio_reva_regs_t *)port, mask, val);
197316
}
198317

199318
/* ************************************************************************** */
200319
void MXC_GPIO_OutToggle(mxc_gpio_regs_t *port, uint32_t mask)
201320
{
321+
if (port == MXC_GPIO4) {
322+
MXC_MCR->gpio4_ctrl ^= GPIO4_DATAOUT_MASK(mask);
323+
return;
324+
}
325+
202326
MXC_GPIO_RevA_OutToggle((mxc_gpio_reva_regs_t *)port, mask);
203327
}
204328

205329
/* ************************************************************************** */
206330
int MXC_GPIO_IntConfig(const mxc_gpio_cfg_t *cfg, mxc_gpio_int_pol_t pol)
207331
{
332+
if (cfg->port == MXC_GPIO4) {
333+
if (pol != MXC_GPIO_INT_BOTH) {
334+
return E_NOT_SUPPORTED;
335+
}
336+
337+
return E_NO_ERROR;
338+
}
339+
208340
return MXC_GPIO_RevA_IntConfig(cfg, pol);
209341
}
210342

211343
/* ************************************************************************** */
212344
void MXC_GPIO_EnableInt(mxc_gpio_regs_t *port, uint32_t mask)
213345
{
346+
if (port == MXC_GPIO4) {
347+
MXC_PWRSEQ->lpwken4 |= (mask & GPIO4_PIN_MASK);
348+
return;
349+
}
350+
214351
MXC_GPIO_RevA_EnableInt((mxc_gpio_reva_regs_t *)port, mask);
215352
}
216353

217354
/* ************************************************************************** */
218355
void MXC_GPIO_DisableInt(mxc_gpio_regs_t *port, uint32_t mask)
219356
{
357+
if (port == MXC_GPIO4) {
358+
MXC_PWRSEQ->lpwken4 &= ~(mask & GPIO4_PIN_MASK);
359+
return;
360+
}
361+
220362
MXC_GPIO_RevA_DisableInt((mxc_gpio_reva_regs_t *)port, mask);
221363
}
222364

@@ -232,17 +374,33 @@ void MXC_GPIO_Handler(unsigned int port)
232374
MXC_GPIO_Common_Handler(port);
233375
}
234376

377+
/* ************************************************************************** */
235378
void MXC_GPIO_ClearFlags(mxc_gpio_regs_t *port, uint32_t flags)
236379
{
380+
if (port == MXC_GPIO4) {
381+
MXC_PWRSEQ->lpwkst4 = flags & GPIO4_PIN_MASK;
382+
return;
383+
}
384+
237385
MXC_GPIO_RevA_ClearFlags((mxc_gpio_reva_regs_t *)port, flags);
238386
}
239387

388+
/* ************************************************************************** */
240389
uint32_t MXC_GPIO_GetFlags(mxc_gpio_regs_t *port)
241390
{
391+
if (port == MXC_GPIO4) {
392+
return MXC_PWRSEQ->lpwkst4 & GPIO4_PIN_MASK;
393+
}
394+
242395
return MXC_GPIO_RevA_GetFlags((mxc_gpio_reva_regs_t *)port);
243396
}
244397

398+
/* ************************************************************************** */
245399
int MXC_GPIO_SetVSSEL(mxc_gpio_regs_t *port, mxc_gpio_vssel_t vssel, uint32_t mask)
246400
{
401+
if (port == MXC_GPIO4) {
402+
return E_NOT_SUPPORTED;
403+
}
404+
247405
return MXC_GPIO_RevA_SetVSSEL((mxc_gpio_reva_regs_t *)port, vssel, mask);
248406
}

0 commit comments

Comments
 (0)