Adding BTLE_LDO_TRIM register. (#402)

* Adding BTLE_LDO_TRIM register.

* ME18: Updated sir_regs.h copyright notice.

* SVD workflow: Differentiate between sir and trimsir.

* SVD workflow: fixed typo.

* SVD workflow: Fixed syntax error.

---------

Co-authored-by: Kevin Gillespie <[email protected]>
Co-authored-by: Sihyung Woo <[email protected]>
MSDK-Commit: 8b473b6d1340e3d32e44d76aaeeaf69e2f29ac33

Author: 2 people

MAX/Libraries/CMSIS/Device/Maxim/MAX32690/Include/sir_regs.h

@@ -5,7 +5,7 @@
  */
 
 /******************************************************************************
- * Copyright (C) 2022 Maxim Integrated Products, Inc., All Rights Reserved.
+ * Copyright (C) 2023 Maxim Integrated Products, Inc., All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -88,7 +88,9 @@ extern "C" {
 typedef struct {
     __I  uint32_t sistat;               /**< <tt>\b 0x00:</tt> SIR SISTAT Register */
     __I  uint32_t siaddr;               /**< <tt>\b 0x04:</tt> SIR SIADDR Register */
-    __R  uint32_t rsv_0x8_0xff[62];
+    __R  uint32_t rsv_0x8_0x27[8];
+    __IO uint32_t btle_ldo_trim;        /**< <tt>\b 0x28:</tt> SIR BTLE_LDO_TRIM Register */
+    __R  uint32_t rsv_0x2c_0xff[53];
     __I  uint32_t fstat;                /**< <tt>\b 0x100:</tt> SIR FSTAT Register */
     __I  uint32_t sfstat;               /**< <tt>\b 0x104:</tt> SIR SFSTAT Register */
 } mxc_sir_regs_t;
@@ -102,6 +104,7 @@ typedef struct {
  */
 #define MXC_R_SIR_SISTAT                   ((uint32_t)0x00000000UL) /**< Offset from SIR Base Address: <tt> 0x0000</tt> */
 #define MXC_R_SIR_SIADDR                   ((uint32_t)0x00000004UL) /**< Offset from SIR Base Address: <tt> 0x0004</tt> */
+#define MXC_R_SIR_BTLE_LDO_TRIM            ((uint32_t)0x00000028UL) /**< Offset from SIR Base Address: <tt> 0x0028</tt> */
 #define MXC_R_SIR_FSTAT                    ((uint32_t)0x00000100UL) /**< Offset from SIR Base Address: <tt> 0x0100</tt> */
 #define MXC_R_SIR_SFSTAT                   ((uint32_t)0x00000104UL) /**< Offset from SIR Base Address: <tt> 0x0104</tt> */
 /**@} end of group sir_registers */
@@ -133,6 +136,20 @@ typedef struct {
 
 /**@} end of group SIR_SIADDR_Register */
 
+/**
+ * @ingroup  sir_registers
+ * @defgroup SIR_BTLE_LDO_TRIM SIR_BTLE_LDO_TRIM
+ * @brief    BTLE LDO Trim register.
+ * @{
+ */
+#define MXC_F_SIR_BTLE_LDO_TRIM_TX_POS                 0 /**< BTLE_LDO_TRIM_TX Position */
+#define MXC_F_SIR_BTLE_LDO_TRIM_TX                     ((uint32_t)(0x1FUL << MXC_F_SIR_BTLE_LDO_TRIM_TX_POS)) /**< BTLE_LDO_TRIM_TX Mask */
+
+#define MXC_F_SIR_BTLE_LDO_TRIM_RX_POS                 5 /**< BTLE_LDO_TRIM_RX Position */
+#define MXC_F_SIR_BTLE_LDO_TRIM_RX                     ((uint32_t)(0x1FUL << MXC_F_SIR_BTLE_LDO_TRIM_RX_POS)) /**< BTLE_LDO_TRIM_RX Mask */
+
+/**@} end of group SIR_BTLE_LDO_TRIM_Register */
+
 /**
  * @ingroup  sir_registers
  * @defgroup SIR_FSTAT SIR_FSTAT