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danieldegrassecarlescufi
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boards: mimxrt1160_evk: add support for loading M4 image from OCRAM
Add support for loading M4 image from OCRAM when running with dual core operation. The M7 core will copy the M4 image from flash into OCRAM, and the M4 core will execute it there. Signed-off-by: Daniel DeGrasse <[email protected]>
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boards/arm/mimxrt1160_evk/Kconfig.defconfig

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@@ -11,9 +11,25 @@ config BOARD
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choice CODE_LOCATION
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default CODE_FLEXSPI if BOARD_MIMXRT1160_EVK_CM7
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default CODE_OCRAM if BOARD_MIMXRT1160_EVK_CM4 && SECOND_CORE_MCUX
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default CODE_SRAM0 if BOARD_MIMXRT1160_EVK_CM4
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endchoice
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if SECOND_CORE_MCUX && BOARD_MIMXRT1160_EVK_CM4
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config BUILD_OUTPUT_INFO_HEADER
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default y
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DT_CHOSEN_IMAGE_M4 = nxp,m4-partition
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# Adjust the offset of the output image if building for RT11xx SOC
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config BUILD_OUTPUT_ADJUST_LMA
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default "($(dt_chosen_reg_addr_hex,$(DT_CHOSEN_IMAGE_M4)) + \
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$(dt_node_reg_addr_hex,/soc/spi@400cc000,1)) - \
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$(dt_node_reg_addr_hex,/soc/ocram@20200000)"
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endif
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 240000000 if BOARD_MIMXRT1160_EVK_CM4 && CORTEX_M_SYSTICK
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default 600000000 if BOARD_MIMXRT1160_EVK_CM7 && CORTEX_M_SYSTICK

boards/arm/mimxrt1160_evk/board.cmake

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# SPDX-License-Identifier: Apache-2.0
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#
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if(CONFIG_SOC_MIMXRT1166_CM7)
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if(CONFIG_SOC_MIMXRT1166_CM7 OR CONFIG_SECOND_CORE_MCUX)
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board_runner_args(pyocd "--target=mimxrt1160_cm7")
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board_runner_args(jlink "--device=MIMXRT1166xxx6_M7" "--reset-after-load")
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endif()
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if(CONFIG_SOC_MIMXRT1166_CM4)
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elseif(CONFIG_SOC_MIMXRT1166_CM4)
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board_runner_args(pyocd "--target=mimxrt1160_cm4")
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# Note: Please use JLINK above V7.50 (Only support run cm4 image when debugging due to default boot core on board is cm7 core)
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board_runner_args(jlink "--device=MIMXRT1166xxx6_M4")

boards/arm/mimxrt1160_evk/mimxrt1160_evk_cm4.dts

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zephyr,shell-uart = &lpuart1;
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zephyr,flash-controller = &is25wp128;
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zephyr,flash = &is25wp128;
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nxp,m4-partition = &slot1_partition;
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};
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boards/arm/mimxrt1160_evk/mimxrt1160_evk_cm7.dts

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zephyr,flash-controller = &is25wp128;
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zephyr,flash = &is25wp128;
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zephyr,code-partition = &slot0_partition;
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zephyr,cpu1-region = &ocram;
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};
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sdram0: memory@80000000 {

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