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[TableGen] Make integers in GlobalISelMatchTable unsigned
The numbers are stored in an `uint8_t` array, either directly or via `GIMT_Encode2/4/8` macros (see `getEncodedEmitStr` and `emitEncodingMacrosDef`). Passing negative numbers only adds confusion and results in a warning for the `INT64_MIN` value (C++ parses `-9223372036854775808` as two tokens: a unary minus and an unsigned integer, triggered in llvm#151687).
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3 files changed

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‎llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td‎

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -617,11 +617,11 @@ def MOV : I<(outs GPR32:$dst), (ins GPR32:$src1),
617617
// R02N-NEXT: // MIs[0] Operand 2
618618
// R02N-NEXT: GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
619619
//
620-
// R02C-NEXT: GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-2)
620+
// R02C-NEXT: GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 254,
621621
// R02C-NEXT: // (xor:{ *:[i32] } GPR32:{ *:[i32] }:$src1, -2:{ *:[i32] }) => (XORI:{ *:[i32] } GPR32:{ *:[i32] }:$src1)
622622
// R02C-NEXT: GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(MyTarget::XORI),
623623
// R02C-NEXT: GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
624-
// R02C-NEXT: GIR_AddImm8, /*InsnID*/0, /*Imm*/uint8_t(-1),
624+
// R02C-NEXT: GIR_AddImm8, /*InsnID*/0, /*Imm*/255,
625625
// R02C-NEXT: GIR_RootToRootCopy, /*OpIdx*/1, // src1
626626
// R02C-NEXT: GIR_RootConstrainSelectedInstOperands,
627627
// R02C-NEXT: // GIR_Coverage, 2,
@@ -648,7 +648,7 @@ def XORI : I<(outs GPR32:$dst), (ins m1:$src2, GPR32:$src1),
648648
// NOOPT-NEXT: GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(MyTarget::GPR32RegClassID),
649649
// NOOPT-NEXT: // MIs[0] Operand 2
650650
// NOOPT-NEXT: GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
651-
// NOOPT-NEXT: GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-3)
651+
// NOOPT-NEXT: GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 253,
652652
// NOOPT-NEXT: // (xor:{ *:[i32] } GPR32:{ *:[i32] }:$src1, -3:{ *:[i32] }) => (XOR:{ *:[i32] } GPR32:{ *:[i32] }:$src1)
653653
// NOOPT-NEXT: GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(MyTarget::XOR),
654654
// NOOPT-NEXT: GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
@@ -676,11 +676,11 @@ def XOR : I<(outs GPR32:$dst), (ins Z:$src2, GPR32:$src1),
676676
// NOOPT-NEXT: GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(MyTarget::GPR32RegClassID),
677677
// NOOPT-NEXT: // MIs[0] Operand 2
678678
// NOOPT-NEXT: GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
679-
// NOOPT-NEXT: GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-4)
679+
// NOOPT-NEXT: GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 252,
680680
// NOOPT-NEXT: // (xor:{ *:[i32] } GPR32:{ *:[i32] }:$src1, -4:{ *:[i32] }) => (XORlike:{ *:[i32] } GPR32:{ *:[i32] }:$src1)
681681
// NOOPT-NEXT: GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(MyTarget::XORlike),
682682
// NOOPT-NEXT: GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
683-
// NOOPT-NEXT: GIR_AddImm8, /*InsnID*/0, /*Imm*/uint8_t(-1),
683+
// NOOPT-NEXT: GIR_AddImm8, /*InsnID*/0, /*Imm*/255,
684684
// NOOPT-NEXT: GIR_AddRegister, /*InsnID*/0, GIMT_Encode2(MyTarget::R0),
685685
// NOOPT-NEXT: GIR_RootToRootCopy, /*OpIdx*/1, // src1
686686
// NOOPT-NEXT: GIR_RootConstrainSelectedInstOperands,
@@ -705,11 +705,11 @@ def XORlike : I<(outs GPR32:$dst), (ins m1Z:$src2, GPR32:$src1),
705705
// NOOPT-NEXT: GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(MyTarget::GPR32RegClassID),
706706
// NOOPT-NEXT: // MIs[0] Operand 2
707707
// NOOPT-NEXT: GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
708-
// NOOPT-NEXT: GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-5),
708+
// NOOPT-NEXT: GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 251,
709709
// NOOPT-NEXT: // (xor:{ *:[i32] } GPR32:{ *:[i32] }:$src1, -5:{ *:[i32] }) => (XORManyDefaults:{ *:[i32] } GPR32:{ *:[i32] }:$src1)
710710
// NOOPT-NEXT: GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(MyTarget::XORManyDefaults),
711711
// NOOPT-NEXT: GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
712-
// NOOPT-NEXT: GIR_AddImm8, /*InsnID*/0, /*Imm*/uint8_t(-1),
712+
// NOOPT-NEXT: GIR_AddImm8, /*InsnID*/0, /*Imm*/255,
713713
// NOOPT-NEXT: GIR_AddRegister, /*InsnID*/0, GIMT_Encode2(MyTarget::R0),
714714
// NOOPT-NEXT: GIR_AddRegister, /*InsnID*/0, GIMT_Encode2(MyTarget::R0),
715715
// NOOPT-NEXT: GIR_RootToRootCopy, /*OpIdx*/1, // src1
@@ -735,7 +735,7 @@ def XORManyDefaults : I<(outs GPR32:$dst), (ins m1Z:$src3, Z:$src2, GPR32:$src1)
735735
// NOOPT-NEXT: GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(MyTarget::GPR32RegClassID),
736736
// NOOPT-NEXT: // MIs[0] Operand 2
737737
// NOOPT-NEXT: GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
738-
// NOOPT-NEXT: GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-6)
738+
// NOOPT-NEXT: GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 250,
739739
// NOOPT-NEXT: // (xor:{ *:[i32] } GPR32:{ *:[i32] }:$src1, -6:{ *:[i32] }) => (XORIb:{ *:[i32] } GPR32:{ *:[i32] }:$src1)
740740
// NOOPT-NEXT: GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(MyTarget::XORIb),
741741
// NOOPT-NEXT: GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
@@ -766,7 +766,7 @@ def XORIb : I<(outs GPR32:$dst), (ins mb:$src2, GPR32:$src1),
766766
// NOOPT-NEXT: GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(MyTarget::GPR32RegClassID),
767767
// NOOPT-NEXT: // MIs[0] Operand 2
768768
// NOOPT-NEXT: GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
769-
// NOOPT-NEXT: GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, uint8_t(-1),
769+
// NOOPT-NEXT: GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 255,
770770
// NOOPT-NEXT: // (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Wm, -1:{ *:[i32] }) => (ORN:{ *:[i32] } R0:{ *:[i32] }, GPR32:{ *:[i32] }:$Wm)
771771
// NOOPT-NEXT: GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(MyTarget::ORN),
772772
// NOOPT-NEXT: GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]

‎llvm/test/TableGen/GlobalISelEmitter/int64min.td‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -17,12 +17,12 @@ def ANDI : I<(outs GPR:$dst), (ins GPR:$src1, i64imm:$src2), []>;
1717
// CHECK-NEXT: GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(MyTarget::GPRRegClassID),
1818
// CHECK-NEXT: // MIs[0] Operand 2
1919
// CHECK-NEXT: GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
20-
// CHECK-NEXT: GIM_CheckConstantInt, /*MI*/0, /*Op*/2, GIMT_Encode8(-9223372036854775808),
20+
// CHECK-NEXT: GIM_CheckConstantInt, /*MI*/0, /*Op*/2, GIMT_Encode8(9223372036854775808),
2121
// CHECK-NEXT: // (and:{ *:[i64] } GPR:{ *:[i64] }:$rs1, -9223372036854775808:{ *:[i64] }) => (ANDI:{ *:[i64] } GPR:{ *:[i64] }:$rs1, -9223372036854775808:{ *:[i64] })
2222
// CHECK-NEXT: GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(MyTarget::ANDI),
2323
// CHECK-NEXT: GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2424
// CHECK-NEXT: GIR_RootToRootCopy, /*OpIdx*/1, // rs1
25-
// CHECK-NEXT: GIR_AddImm, /*InsnID*/0, /*Imm*/GIMT_Encode8(-9223372036854775808),
25+
// CHECK-NEXT: GIR_AddImm, /*InsnID*/0, /*Imm*/GIMT_Encode8(9223372036854775808),
2626
// CHECK-NEXT: GIR_RootConstrainSelectedInstOperands,
2727
// CHECK-NEXT: // GIR_Coverage, 0,
2828
// CHECK-NEXT: GIR_EraseRootFromParent_Done,

‎llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp‎

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -237,9 +237,10 @@ MatchTableRecord MatchTable::NamedValue(unsigned NumBytes, StringRef Namespace,
237237

238238
MatchTableRecord MatchTable::IntValue(unsigned NumBytes, int64_t IntValue) {
239239
assert(isUIntN(NumBytes * 8, IntValue) || isIntN(NumBytes * 8, IntValue));
240-
auto Str = llvm::to_string(IntValue);
241-
if (NumBytes == 1 && IntValue < 0)
242-
Str = "uint8_t(" + Str + ")";
240+
uint64_t UIntValue = IntValue;
241+
if (NumBytes < 8)
242+
UIntValue &= (UINT64_C(1) << NumBytes * 8) - 1;
243+
auto Str = llvm::to_string(UIntValue);
243244
// TODO: Could optimize this directly to save the compiler some work when
244245
// building the file
245246
return MatchTableRecord(std::nullopt, Str, NumBytes,

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