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gowin: Improved eraseSRAM/SPI Flash prepare for Arora V devices
1 parent f7b7e77 commit 5ced26c

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+45
-32
lines changed

1 file changed

+45
-32
lines changed

src/gowin.cpp

Lines changed: 45 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -911,7 +911,10 @@ bool Gowin::eraseSRAM()
911911
// is set
912912
bool auto_boot_2nd_fail = (status & (1 << 4)) == (1 << 4);
913913
bool is_timeout = (status & (1 << 3)) == (1 << 3);
914-
if (is_gw5a && (is_timeout || auto_boot_2nd_fail)) {
914+
bool bad_cmd = (status & STATUS_BAD_COMMAND) == STATUS_BAD_COMMAND;
915+
uint8_t loop = 0;
916+
bool must_loop = is_gw5a;
917+
if (is_gw5a && (is_timeout || auto_boot_2nd_fail || bad_cmd)) {
915918
send_command(CONFIG_ENABLE);
916919
send_command(0x3F);
917920
send_command(CONFIG_DISABLE);
@@ -920,36 +923,44 @@ bool Gowin::eraseSRAM()
920923
send_command(NOOP);
921924
_jtag->toggleClk(125 * 8);
922925
}
926+
do {
923927

924-
if (!enableCfg()) {
925-
printError("FAIL");
926-
return false;
927-
}
928-
send_command(ERASE_SRAM);
929-
send_command(NOOP);
928+
if (!enableCfg()) {
929+
printError("FAIL");
930+
return false;
931+
}
932+
send_command(ERASE_SRAM);
933+
send_command(NOOP);
930934

931-
/* TN653 specifies to wait for 4ms with
932-
* clock generated but
933-
* status register bit MEMORY_ERASE goes low when ERASE_SRAM
934-
* is send and goes high after erase
935-
* this check seems enough
936-
*/
937-
if (_idcode == 0x0001081b) // seems required for GW5AST...
938-
sendClkUs(10000);
939-
if (pollFlag(STATUS_MEMORY_ERASE, STATUS_MEMORY_ERASE)) {
940-
if (_verbose)
941-
displayReadReg("after erase sram", readStatusReg());
942-
} else {
943-
printError("FAIL");
944-
return false;
945-
}
935+
/* TN653 specifies to wait for 4ms with
936+
* clock generated but
937+
* status register bit MEMORY_ERASE goes low when ERASE_SRAM
938+
* is send and goes high after erase
939+
* this check seems enough
940+
*/
941+
if (_idcode == 0x0001081b) // seems required for GW5AST...
942+
sendClkUs(10000);
943+
if (pollFlag(STATUS_MEMORY_ERASE, STATUS_MEMORY_ERASE)) {
944+
if (_verbose)
945+
displayReadReg("after erase sram", readStatusReg());
946+
} else {
947+
printError("FAIL");
948+
return false;
949+
}
946950

947-
send_command(XFER_DONE);
948-
send_command(NOOP);
949-
if (!disableCfg()) {
950-
printError("FAIL");
951-
return false;
952-
}
951+
send_command(XFER_DONE);
952+
send_command(NOOP);
953+
if (!disableCfg()) {
954+
printError("FAIL");
955+
return false;
956+
}
957+
if (is_gw5a) {
958+
uint32_t status_reg = readStatusReg();
959+
if ((loop >= 1) && ((status_reg & (1 << 13)) == 0))
960+
must_loop = false;
961+
loop++;
962+
}
963+
} while(must_loop);
953964

954965
if (_mode == Device::FLASH_MODE) {
955966
uint32_t status_reg = readStatusReg();
@@ -1179,16 +1190,18 @@ bool Gowin::dumpFlash(uint32_t base_addr, uint32_t len)
11791190

11801191
bool Gowin::prepare_flash_access()
11811192
{
1193+
/* Work around FPGA stuck in Bad Command status */
1194+
if (is_gw5a) {
1195+
reset();
1196+
_jtag->set_state(Jtag::RUN_TEST_IDLE);
1197+
_jtag->toggleClk(1000000);
1198+
}
11821199
if (!eraseSRAM()) {
11831200
printError("Error: fail to erase SRAM");
11841201
return false;
11851202
}
11861203

11871204
if (is_gw5a) {
1188-
if (!eraseSRAM()) {
1189-
printError("Error: fail to erase SRAM");
1190-
return false;
1191-
}
11921205
usleep(100000);
11931206
if (!gw5a_enable_spi()) {
11941207
printError("Error: fail to switch GW5A to SPI mode");

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