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dstogovdstogov
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Update IR
IR commit: 1b50e33690406928a3f50491214b66460e82bb2c
1 parent 6da8b93 commit 41a7265

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5 files changed

+208
-142
lines changed

5 files changed

+208
-142
lines changed

‎ext/opcache/jit/ir/ir.h‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -798,6 +798,7 @@ struct _ir_loader {
798798
uint32_t flags, ir_type ret_type, uint32_t params_count, const uint8_t *param_types);
799799
bool (*sym_dcl) (ir_loader *loader, const char *name, uint32_t flags, size_t size, bool has_data);
800800
bool (*sym_data) (ir_loader *loader, ir_type type, uint32_t count, const void *data);
801+
bool (*sym_data_pad) (ir_loader *loader, size_t offset);
801802
bool (*sym_data_ref) (ir_loader *loader, ir_op op, const char *ref);
802803
bool (*sym_data_end) (ir_loader *loader);
803804
bool (*func_init) (ir_loader *loader, ir_ctx *ctx, const char *name);

‎ext/opcache/jit/ir/ir_aarch64.dasc‎

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -648,7 +648,8 @@ binop_fp:
648648
// const
649649
} else if (op2_insn->val.u64 == 1) {
650650
return IR_COPY_INT;
651-
} else if (IR_IS_POWER_OF_TWO(op2_insn->val.u64)) {
651+
} else if (IR_IS_TYPE_UNSIGNED(insn->type) && IR_IS_POWER_OF_TWO(op2_insn->val.u64)) {
652+
// TODO: signed division by power of two ???
652653
return IR_DIV_PWR2;
653654
}
654655
}
@@ -663,6 +664,7 @@ binop_fp:
663664
if (IR_IS_CONST_REF(insn->op1)) {
664665
// const
665666
} else if (IR_IS_TYPE_UNSIGNED(insn->type) && IR_IS_POWER_OF_TWO(op2_insn->val.u64)) {
667+
// TODO: signed division by power of two ???
666668
return IR_MOD_PWR2;
667669
}
668670
}
@@ -1860,9 +1862,11 @@ static void ir_emit_mul_div_mod_pwr2(ir_ctx *ctx, ir_ref def, ir_insn *insn)
18601862
}
18611863
} else if (insn->op == IR_DIV) {
18621864
uint32_t shift = IR_LOG2(ctx->ir_base[insn->op2].val.u64);
1865+
IR_ASSERT(IR_IS_TYPE_UNSIGNED(insn->type));
18631866
| ASM_REG_REG_IMM_OP lsr, insn->type, def_reg, op1_reg, shift
18641867
} else {
18651868
IR_ASSERT(insn->op == IR_MOD);
1869+
IR_ASSERT(IR_IS_TYPE_UNSIGNED(insn->type));
18661870
uint64_t mask = ctx->ir_base[insn->op2].val.u64 - 1;
18671871
| ASM_REG_REG_IMM_OP and, insn->type, def_reg, op1_reg, mask
18681872
}

‎ext/opcache/jit/ir/ir_emit.c‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -487,6 +487,7 @@ static void ir_emit_dessa_moves(ir_ctx *ctx, int b, ir_block *bb)
487487
IR_ASSERT(src == IR_REG_NONE);
488488
#if defined(IR_TARGET_X86) || defined(IR_TARGET_X64)
489489
if (IR_IS_TYPE_INT(insn->type)
490+
&& !IR_IS_SYM_CONST(ctx->ir_base[input].op)
490491
&& (ir_type_size[insn->type] != 8 || IR_IS_SIGNED_32BIT(ctx->ir_base[input].val.i64))) {
491492
ir_emit_store_imm(ctx, insn->type, ref, ctx->ir_base[input].val.i32);
492493
continue;
@@ -609,7 +610,7 @@ int ir_match(ir_ctx *ctx)
609610
if (insn->op == IR_END || insn->op == IR_LOOP_END) {
610611
ctx->rules[ref] = insn->op;
611612
ref = prev_ref[ref];
612-
if (ref == start) {
613+
if (ref == start && ctx->cfg_edges[bb->successors] != b) {
613614
if (EXPECTED(!(bb->flags & IR_BB_ENTRY))) {
614615
bb->flags |= IR_BB_EMPTY;
615616
} else if (ctx->flags & IR_MERGE_EMPTY_ENTRIES) {

‎ext/opcache/jit/ir/ir_fold.h‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1880,7 +1880,7 @@ IR_FOLD(ADD(ADD, C_U32))
18801880
IR_FOLD(ADD(ADD, C_U64))
18811881
IR_FOLD(ADD(ADD, C_ADDR))
18821882
{
1883-
if (IR_IS_CONST_REF(op1_insn->op2)) {
1883+
if (IR_IS_CONST_REF(op1_insn->op2) && !IR_IS_SYM_CONST(ctx->ir_base[op1_insn->op2].op)) {
18841884
/* (x + c1) + c2 => x + (c1 + c2) */
18851885
val.u64 = ctx->ir_base[op1_insn->op2].val.u64 + op2_insn->val.u64;
18861886
op1 = op1_insn->op1;
@@ -1895,7 +1895,7 @@ IR_FOLD(ADD(ADD, C_I16))
18951895
IR_FOLD(ADD(ADD, C_I32))
18961896
IR_FOLD(ADD(ADD, C_I64))
18971897
{
1898-
if (IR_IS_CONST_REF(op1_insn->op2)) {
1898+
if (IR_IS_CONST_REF(op1_insn->op2) && !IR_IS_SYM_CONST(ctx->ir_base[op1_insn->op2].op)) {
18991899
/* (x + c1) + c2 => x + (c1 + c2) */
19001900
val.i64 = ctx->ir_base[op1_insn->op2].val.i64 + op2_insn->val.i64;
19011901
op1 = op1_insn->op1;
@@ -1910,7 +1910,7 @@ IR_FOLD(MUL(MUL, C_U16))
19101910
IR_FOLD(MUL(MUL, C_U32))
19111911
IR_FOLD(MUL(MUL, C_U64))
19121912
{
1913-
if (IR_IS_CONST_REF(op1_insn->op2)) {
1913+
if (IR_IS_CONST_REF(op1_insn->op2) && !IR_IS_SYM_CONST(ctx->ir_base[op1_insn->op2].op)) {
19141914
/* (x * c1) * c2 => x * (c1 * c2) */
19151915
val.u64 = ctx->ir_base[op1_insn->op2].val.u64 * op2_insn->val.u64;
19161916
op1 = op1_insn->op1;
@@ -1925,7 +1925,7 @@ IR_FOLD(MUL(MUL, C_I16))
19251925
IR_FOLD(MUL(MUL, C_I32))
19261926
IR_FOLD(MUL(MUL, C_I64))
19271927
{
1928-
if (IR_IS_CONST_REF(op1_insn->op2)) {
1928+
if (IR_IS_CONST_REF(op1_insn->op2) && !IR_IS_SYM_CONST(ctx->ir_base[op1_insn->op2].op)) {
19291929
/* (x * c1) * c2 => x * (c1 * c2) */
19301930
val.i64 = ctx->ir_base[op1_insn->op2].val.i64 * op2_insn->val.i64;
19311931
op1 = op1_insn->op1;
@@ -1944,7 +1944,7 @@ IR_FOLD(AND(AND, C_I16))
19441944
IR_FOLD(AND(AND, C_I32))
19451945
IR_FOLD(AND(AND, C_I64))
19461946
{
1947-
if (IR_IS_CONST_REF(op1_insn->op2)) {
1947+
if (IR_IS_CONST_REF(op1_insn->op2) && !IR_IS_SYM_CONST(ctx->ir_base[op1_insn->op2].op)) {
19481948
/* (x & c1) & c2 => x & (c1 & c2) */
19491949
val.u64 = ctx->ir_base[op1_insn->op2].val.u64 & op2_insn->val.u64;
19501950
op1 = op1_insn->op1;
@@ -1963,7 +1963,7 @@ IR_FOLD(OR(OR, C_I16))
19631963
IR_FOLD(OR(OR, C_I32))
19641964
IR_FOLD(OR(OR, C_I64))
19651965
{
1966-
if (IR_IS_CONST_REF(op1_insn->op2)) {
1966+
if (IR_IS_CONST_REF(op1_insn->op2) && !IR_IS_SYM_CONST(ctx->ir_base[op1_insn->op2].op)) {
19671967
/* (x | c1) | c2 => x | (c1 | c2) */
19681968
val.u64 = ctx->ir_base[op1_insn->op2].val.u64 | op2_insn->val.u64;
19691969
op1 = op1_insn->op1;
@@ -1982,7 +1982,7 @@ IR_FOLD(XOR(XOR, C_I16))
19821982
IR_FOLD(XOR(XOR, C_I32))
19831983
IR_FOLD(XOR(XOR, C_I64))
19841984
{
1985-
if (IR_IS_CONST_REF(op1_insn->op2)) {
1985+
if (IR_IS_CONST_REF(op1_insn->op2) && !IR_IS_SYM_CONST(ctx->ir_base[op1_insn->op2].op)) {
19861986
/* (x ^ c1) ^ c2 => x ^ (c1 ^ c2) */
19871987
val.u64 = ctx->ir_base[op1_insn->op2].val.u64 ^ op2_insn->val.u64;
19881988
op1 = op1_insn->op1;

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