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Fix JIT stack setup on aarch64/clang
On aarch64 we must set IR_USE_FRAME_POINTER to ensure that LR/x30 is saved. Also, fixed_stack_frame_size must be n*16, not n*16+8 like on x86. Fixes GH-19601 Closes GH-19630
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NEWS

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@@ -8,6 +8,7 @@ PHP NEWS
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- Opcache:
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. Fixed bug GH-19486 (Incorrect opline after deoptimization). (Arnaud)
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. Fixed bug GH-19601 (Wrong JIT stack setup on aarch64/clang). (Arnaud)
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- PCRE:
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. Upgraded to pcre2lib from 10.45 to 10.46. (nielsdos)

ext/opcache/jit/zend_jit_ir.c

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@@ -2734,7 +2734,15 @@ static void zend_jit_init_ctx(zend_jit_ctx *jit, uint32_t flags)
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/* Stack must be 16 byte aligned */
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/* TODO: select stack size ??? */
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#if ZEND_VM_KIND == ZEND_VM_KIND_TAILCALL
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# if defined(IR_TARGET_AARCH64)
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/* Must save LR */
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jit->ctx.flags |= IR_USE_FRAME_POINTER;
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/* Same as HYBRID VM */
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jit->ctx.fixed_stack_frame_size = sizeof(void*) * 4; /* 4 spill slots */
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# else
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/* Same as HYBRID VM, plus 1 slot for re-alignment (caller pushes return address, frame is not aligned on entry) */
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jit->ctx.fixed_stack_frame_size = sizeof(void*) * 5; /* 5 spill slots (8 bytes) or 10 spill slots (4 bytes) */
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# endif
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#elif defined(IR_TARGET_AARCH64)
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jit->ctx.flags |= IR_USE_FRAME_POINTER;
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jit->ctx.fixed_stack_frame_size = sizeof(void*) * 16; /* 10 saved registers and 6 spill slots (8 bytes) */

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