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Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Fixes for a few clk drivers and bindings: - Add a missing property to the Mediatek MT8188 clk binding to keep binding checks happy - Avoid an OOB by setting the correct number of parents in dispmix_csr_clk_dev_data - Allocate clk_hw structs early in probe to avoid an ordering issue where clk_parent_data points to an unallocated clk_hw when the child clk is registered before the parent clk in the SCMI clk driver * tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: dt-bindings: clock: mediatek: Add #reset-cells property for MT8188 clk: imx: Fix an out-of-bounds access in dispmix_csr_clk_dev_data clk: scmi: Handle case where child clocks are initialized before their parents
2 parents 5d5d622 + a42b4dc commit 3cd7521

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3 files changed

+21
-12
lines changed

3 files changed

+21
-12
lines changed

Documentation/devicetree/bindings/clock/mediatek,mt8188-clock.yaml

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -52,6 +52,9 @@ properties:
5252
'#clock-cells':
5353
const: 1
5454

55+
'#reset-cells':
56+
const: 1
57+
5558
required:
5659
- compatible
5760
- reg

drivers/clk/clk-scmi.c

Lines changed: 10 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -404,6 +404,7 @@ static int scmi_clocks_probe(struct scmi_device *sdev)
404404
const struct scmi_handle *handle = sdev->handle;
405405
struct scmi_protocol_handle *ph;
406406
const struct clk_ops *scmi_clk_ops_db[SCMI_MAX_CLK_OPS] = {};
407+
struct scmi_clk *sclks;
407408

408409
if (!handle)
409410
return -ENODEV;
@@ -430,18 +431,21 @@ static int scmi_clocks_probe(struct scmi_device *sdev)
430431
transport_is_atomic = handle->is_transport_atomic(handle,
431432
&atomic_threshold_us);
432433

434+
sclks = devm_kcalloc(dev, count, sizeof(*sclks), GFP_KERNEL);
435+
if (!sclks)
436+
return -ENOMEM;
437+
438+
for (idx = 0; idx < count; idx++)
439+
hws[idx] = &sclks[idx].hw;
440+
433441
for (idx = 0; idx < count; idx++) {
434-
struct scmi_clk *sclk;
442+
struct scmi_clk *sclk = &sclks[idx];
435443
const struct clk_ops *scmi_ops;
436444

437-
sclk = devm_kzalloc(dev, sizeof(*sclk), GFP_KERNEL);
438-
if (!sclk)
439-
return -ENOMEM;
440-
441445
sclk->info = scmi_proto_clk_ops->info_get(ph, idx);
442446
if (!sclk->info) {
443447
dev_dbg(dev, "invalid clock info for idx %d\n", idx);
444-
devm_kfree(dev, sclk);
448+
hws[idx] = NULL;
445449
continue;
446450
}
447451

@@ -479,13 +483,11 @@ static int scmi_clocks_probe(struct scmi_device *sdev)
479483
if (err) {
480484
dev_err(dev, "failed to register clock %d\n", idx);
481485
devm_kfree(dev, sclk->parent_data);
482-
devm_kfree(dev, sclk);
483486
hws[idx] = NULL;
484487
} else {
485488
dev_dbg(dev, "Registered clock:%s%s\n",
486489
sclk->info->name,
487490
scmi_ops->enable ? " (atomic ops)" : "");
488-
hws[idx] = &sclk->hw;
489491
}
490492
}
491493

drivers/clk/imx/clk-imx95-blk-ctl.c

Lines changed: 8 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -219,11 +219,15 @@ static const struct imx95_blk_ctl_dev_data lvds_csr_dev_data = {
219219
.clk_reg_offset = 0,
220220
};
221221

222+
static const char * const disp_engine_parents[] = {
223+
"videopll1", "dsi_pll", "ldb_pll_div7"
224+
};
225+
222226
static const struct imx95_blk_ctl_clk_dev_data dispmix_csr_clk_dev_data[] = {
223227
[IMX95_CLK_DISPMIX_ENG0_SEL] = {
224228
.name = "disp_engine0_sel",
225-
.parent_names = (const char *[]){"videopll1", "dsi_pll", "ldb_pll_div7", },
226-
.num_parents = 4,
229+
.parent_names = disp_engine_parents,
230+
.num_parents = ARRAY_SIZE(disp_engine_parents),
227231
.reg = 0,
228232
.bit_idx = 0,
229233
.bit_width = 2,
@@ -232,8 +236,8 @@ static const struct imx95_blk_ctl_clk_dev_data dispmix_csr_clk_dev_data[] = {
232236
},
233237
[IMX95_CLK_DISPMIX_ENG1_SEL] = {
234238
.name = "disp_engine1_sel",
235-
.parent_names = (const char *[]){"videopll1", "dsi_pll", "ldb_pll_div7", },
236-
.num_parents = 4,
239+
.parent_names = disp_engine_parents,
240+
.num_parents = ARRAY_SIZE(disp_engine_parents),
237241
.reg = 0,
238242
.bit_idx = 2,
239243
.bit_width = 2,

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