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juhosgbroonie
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spi: spi-qpic-snand: don't hardcode ECC steps
NAND devices with different page sizes requires different number of ECC steps, yet the qcom_spi_ecc_init_ctx_pipelined() function sets 4 steps in 'ecc_cfg' unconditionally. The correct number of the steps is calculated earlier in the function already, so use that instead of the hardcoded value. Fixes: 7304d19 ("spi: spi-qpic: add driver for QCOM SPI NAND flash Interface") Signed-off-by: Gabor Juhos <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Mark Brown <[email protected]>
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drivers/spi/spi-qpic-snand.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -308,7 +308,7 @@ static int qcom_spi_ecc_init_ctx_pipelined(struct nand_device *nand)
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ecc_cfg->bch_enabled = true;
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ecc_cfg->bytes = ecc_cfg->ecc_bytes_hw + ecc_cfg->spare_bytes + ecc_cfg->bbm_size;
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311-
ecc_cfg->steps = 4;
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ecc_cfg->steps = cwperpage;
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ecc_cfg->cw_data = 516;
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ecc_cfg->cw_size = ecc_cfg->cw_data + ecc_cfg->bytes;
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bad_block_byte = mtd->writesize - ecc_cfg->cw_size * (cwperpage - 1) + 1;

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