Merge branch 'espressif:master' into master

Author: Jason2866

COMPATIBILITY.md

@@ -97,6 +97,18 @@ Supported since ESP-IDF v5.0.
 | release/v5.2           | v5.2.2+     | v5.2     |
 | release/v5.3 and above | v5.3+       | v5.3     |
 
+#### v2.0
+
+| Release branch         | Recommended | Required |
+|------------------------|-------------|----------|
+| release/v5.0           | v5.0.8+     | v5.0.8   |
+| release/v5.1           | v5.1.5+     | v5.1.5*  |
+| release/v5.2           | v5.2.4+     | v5.2.4   |
+| release/v5.3           | v5.3.2+     | v5.3.2*  |
+| release/v5.4 and above | v5.4+       | v5.4     |
+
+Note: IDF v5.1.5 and v5.3.2 are compatible with C2 v2.0. However the chip revision check hasn't been updated on these releases. Enable `ESP32C2_REV2_DEVELOPMENT` config to bypass the outdated check.
+
 ### ESP32-C6
 
 #### v0.0, v0.1
@@ -109,6 +121,16 @@ Supported since ESP-IDF v5.1.
 
 Supported since ESP-IDF v5.1.
 
+#### v1.2
+
+| Release branch         | Recommended | Required |
+|------------------------|-------------|----------|
+| release/v5.1           | v5.1.6+     | v5.1.6   |
+| release/v5.2           | v5.2.5+     | v5.2.5   |
+| release/v5.3           | v5.3.3+     | v5.3.3   |
+| release/v5.4           | v5.4.1+     | v5.4.1   |
+| release/v5.5 and above | v5.5+       | v5.5     |
+
 ## What If the ESP-IDF Version Is Lower than the `Required` Version?
 
 Latest ESP-IDF versions can prevent from downloading to, or even execute binaries on unsupported chips. ESP-IDF of versions v4.4.5+, v5.0.1+, v5.1 and above have both esptool download check and bootloader loading check against the chip revision. While ESP-IDF v4.3.5 has only esptool downloading check.

COMPATIBILITY_CN.md

@@ -97,6 +97,18 @@
 | release/v5.2           | v5.2.2+     | v5.1     |
 | release/v5.3 及以上     | v5.3+       | v5.3     |
 
+#### v2.0
+
+| 发布分支                | 推荐版本      | 需求版本  |
+|------------------------|-------------|----------|
+| release/v5.0           | v5.0.8+     | v5.0.8   |
+| release/v5.1           | v5.1.5+     | v5.1.5*  |
+| release/v5.2           | v5.2.4+     | v5.2.4   |
+| release/v5.3           | v5.3.2+     | v5.3.2*  |
+| release/v5.4 及以上     | v5.4+       | v5.4     |
+
+提示: IDF v5.1.5 及 v5.3.2 与 C2 v2.0 兼容，但芯片版本检查尚未在这些发布版本更新。使能 `ESP32C2_REV2_DEVELOPMENT` 选项来跳过这些过时的检查。
+
 ### ESP32-C6
 
 #### v0.0, v0.1
@@ -109,6 +121,16 @@
 
 从 ESP-IDF v5.1 开始支持。
 
+#### v1.2
+
+| 发布分支                | 推荐版本      | 需求版本  |
+|------------------------|-------------|----------|
+| release/v5.1           | v5.1.6+     | v5.1.6   |
+| release/v5.2           | v5.2.5+     | v5.2.5   |
+| release/v5.3           | v5.3.3+     | v5.3.3   |
+| release/v5.4           | v5.4.1+     | v5.4.1   |
+| release/v5.5 及以上     | v5.5+       | v5.5     |
+
 
 ## 如果 ESP-IDF 版本低于 `需求版本` 会出现什么情况？
 

components/bootloader_support/src/bootloader_mem.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -12,14 +12,12 @@
 #include "bootloader_mem.h"
 #include "esp_cpu.h"
 
-#if SOC_APM_SUPPORTED
 #include "hal/apm_hal.h"
-#endif
 
 void bootloader_init_mem(void)
 {
 
-#if !defined(BOOTLOADER_BUILD) && defined(SOC_APM_SUPPORTED)
+#if !defined(BOOTLOADER_BUILD)
     /* By default, these access path filters are enable and allow the
      * access to masters only if they are in TEE mode. Since all masters
      * except HP CPU boots in REE mode, default setting of these filters

components/bt/CMakeLists.txt

@@ -870,12 +870,27 @@ if(CONFIG_BT_ENABLED)
 
 endif()
 
+
+set(bt_priv_requires
+    nvs_flash
+    soc
+    esp_pm
+    esp_phy
+    esp_coex
+    mbedtls
+    esp_driver_uart
+    vfs
+    esp_ringbuf
+    esp_driver_spi
+    esp_driver_gpio
+    esp_gdbstub
+)
+
 idf_component_register(SRCS "${srcs}"
                        INCLUDE_DIRS "${include_dirs}"
                        PRIV_INCLUDE_DIRS "${priv_include_dirs}"
                        REQUIRES esp_timer esp_wifi
-                       PRIV_REQUIRES nvs_flash soc esp_pm esp_phy esp_coex mbedtls esp_driver_uart vfs esp_ringbuf
-                                     esp_driver_spi esp_driver_gpio
+                       PRIV_REQUIRES "${bt_priv_requires}"
                        LDFRAGMENTS "${ldscripts}")
 
 if(CONFIG_BT_ENABLED)

components/bt/Kconfig

@@ -81,8 +81,6 @@ menu "Bluetooth"
             So this option will disable the PMP (ESP_SYSTEM_PMP_IDRAM_SPLIT)
 
     menu "Common Options"
-        visible if (BT_BLUEDROID_ENABLED || BT_NIMBLE_ENABLED)
-
         source "$IDF_PATH/components/bt/common/Kconfig.in"
     endmenu
 

components/bt/common/Kconfig.in

@@ -1,6 +1,7 @@
 config BT_ALARM_MAX_NUM
     int "Maximum number of Bluetooth alarms"
     default 50
+    depends on (BT_BLUEDROID_ENABLED || BT_NIMBLE_ENABLED)
     help
         This option decides the maximum number of alarms which
         could be used by Bluetooth host.

components/bt/common/ble_log/ble_log_spi_out.c

@@ -176,8 +176,10 @@ IRAM_ATTR static void esp_timer_cb_flushout(void)
         if (trans_head->trans.length) {
             spi_out_append_trans();
         }
-    } else {
-        // Restart flushout timer
+    }
+
+    // Restart flushout timer if not active
+    if (!esp_timer_is_active(flushout_timer_handle)) {
         esp_timer_start_once(flushout_timer_handle, SPI_OUT_FLUSHOUT_TIMEOUT);
     }
 
@@ -193,6 +195,9 @@ IRAM_ATTR static void esp_timer_cb_ts_sync(void)
     uint32_t lc_ts = 0;
     uint32_t esp_ts = 0;
 
+    // Toggle sync IO
+    sync_io_level = !sync_io_level;
+
     // Enter critical
     portMUX_TYPE spinlock = portMUX_INITIALIZER_UNLOCKED;
     portENTER_CRITICAL_SAFE(&spinlock);
@@ -205,7 +210,7 @@ IRAM_ATTR static void esp_timer_cb_ts_sync(void)
     lc_ts = r_os_cputime_get32();
 #endif // CONFIG_IDF_TARGET_ESP32C2
 
-    // Toggle Sync IO
+    // Set sync IO level
     gpio_set_level(CONFIG_BT_BLE_LOG_SPI_OUT_SYNC_IO_NUM, (uint32_t)sync_io_level);
 
     // Get ESP timestamp
@@ -219,9 +224,6 @@ IRAM_ATTR static void esp_timer_cb_ts_sync(void)
     memcpy(sync_frame + 1, &lc_ts, sizeof(lc_ts));
     memcpy(sync_frame + 5, &esp_ts, sizeof(esp_ts));
     ble_log_spi_out_write(BLE_LOG_SPI_OUT_SOURCE_SYNC, sync_frame, 9);
-
-    // Update IO level
-    sync_io_level = !sync_io_level;
 }
 #endif // CONFIG_BT_BLE_LOG_SPI_OUT_TS_SYNC_ENABLED
 
@@ -351,6 +353,10 @@ void ble_log_spi_out_ts_sync_stop(void)
         if (esp_timer_is_active(ts_sync_timer_handle)) {
             esp_timer_stop(ts_sync_timer_handle);
         }
+
+        // Set sync IO to low level
+        sync_io_level = 0;
+        gpio_set_level(CONFIG_BT_BLE_LOG_SPI_OUT_SYNC_IO_NUM, (uint32_t)sync_io_level);
     }
 }
 #endif // CONFIG_BT_BLE_LOG_SPI_OUT_TS_SYNC_ENABLED

components/bt/common/ble_log/include/ble_log/ble_log_spi_out.h

@@ -6,6 +6,7 @@
 #ifndef __BT_SPI_OUT_H__
 #define __BT_SPI_OUT_H__
 
+#include <stdarg.h>
 #include <string.h>
 #include "driver/spi_master.h"
 #include "driver/gpio.h"
@@ -19,6 +20,7 @@
 #define BLE_LOG_SPI_OUT_SOURCE_NIMBLE 3
 #define BLE_LOG_SPI_OUT_SOURCE_HCI_UPSTREAM 4
 #define BLE_LOG_SPI_OUT_SOURCE_HCI_DOWNSTREAM 5
+#define BLE_LOG_SPI_OUT_SOURCE_USER 0x10
 #define BLE_LOG_SPI_OUT_SOURCE_SYNC 0xFE
 #define BLE_LOG_SPI_OUT_SOURCE_LOSS 0xFF
 

components/bt/controller/esp32c2/bt.c

@@ -393,11 +393,11 @@ void esp_bt_read_ctrl_log_from_flash(bool output)
     portENTER_CRITICAL_SAFE(&spinlock);
     esp_panic_handler_feed_wdts();
     ble_log_async_output_dump_all(true);
-    stop_write = true;
     esp_bt_ontroller_log_deinit();
-    portEXIT_CRITICAL_SAFE(&spinlock);
+    stop_write = true;
 
     buffer = (const uint8_t *)mapped_ptr;
+    esp_panic_handler_feed_wdts();
     if (is_filled) {
         read_index = next_erase_index;
     } else {
@@ -409,14 +409,15 @@ void esp_bt_read_ctrl_log_from_flash(bool output)
     while (read_index != write_index) {
         esp_rom_printf("%02x ", buffer[read_index]);
         if (print_len > max_print_len) {
-            vTaskDelay(2);
+            esp_panic_handler_feed_wdts();
             print_len = 0;
         }
 
         print_len++;
         read_index = (read_index + 1) % MAX_STORAGE_SIZE;
     }
     esp_rom_printf(":DUMP_END]\r\n");
+    portEXIT_CRITICAL_SAFE(&spinlock);
     esp_partition_munmap(mmap_handle);
     err = esp_bt_controller_log_init(log_output_mode);
     assert(err == ESP_OK);
@@ -430,13 +431,17 @@ static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, b
         esp_bt_controller_log_storage(len, addr, end);
 #endif //CONFIG_BT_LE_CONTROLLER_LOG_STORAGE_ENABLE
     } else {
+        portMUX_TYPE spinlock = portMUX_INITIALIZER_UNLOCKED;
+        portENTER_CRITICAL_SAFE(&spinlock);
+        esp_panic_handler_feed_wdts();
         for (int i = 0; i < len; i++) {
             esp_rom_printf("%02x ", addr[i]);
         }
 
         if (end) {
             esp_rom_printf("\n");
         }
+        portEXIT_CRITICAL_SAFE(&spinlock);
     }
 }
 

components/bt/controller/esp32c5/Kconfig.in

@@ -396,6 +396,12 @@ menu "Controller debug features"
     config BT_LE_ASSERT_WHEN_ABNORMAL_DISCONN_ENABLED
         bool "When ACL disconnects abnormally, assertion processing is performed(Experimental)"
         default n
+
+    config BT_LE_DEBUG_REMAIN_SCENE_ENABLED
+        bool "Remain scene with GDB to capture relevant status info(Experimental)"
+        default n
+        help
+            Retain scene with GDB to capture info, requires disabling WDT (CONFIG_ESP_INT_WDT, CONFIG_ESP_TASK_WDT_EN).
 endmenu
 
 config BT_LE_LL_RESOLV_LIST_SIZE