|
5 | 5 | */
|
6 | 6 | #include <stdint.h>
|
7 | 7 | #include <stdbool.h>
|
8 |
| -#include "sdkconfig.h" |
9 | 8 | #include "ulp_lp_core.h"
|
10 | 9 | #include "ulp_lp_core_utils.h"
|
11 | 10 | #include "ulp_lp_core_gpio.h"
|
12 |
| -#include "ulp_lp_core_interrupts.h" |
13 |
| -#include "ulp_lp_core_print.h" |
14 |
| -#include "riscv/csr.h" |
15 |
| - |
16 |
| -#define DEBOUNCE_INTERVAL_CYCLES 10 // 10 cycles is about 0.625 us at 16 MHz |
17 |
| - |
18 |
| -#define SIMULATED_PULSE_FREQUENCY_HZ 2 |
19 |
| -#define SIMULATED_PULSE_DELAY_US (1000000 / SIMULATED_PULSE_FREQUENCY_HZ) / 2 |
20 |
| - |
21 |
| -uint32_t pulse_count; |
22 |
| -static uint32_t last_trigger_time_cycles; |
23 |
| - |
24 |
| -void LP_CORE_ISR_ATTR ulp_lp_core_lp_io_intr_handler(void) |
25 |
| -{ |
26 |
| - ulp_lp_core_gpio_clear_intr_status(); |
27 |
| - uint32_t trigger_time_cycles = RV_READ_CSR(mcycle); |
28 |
| - /* Do some simple debouncing, do not count spurious pulses */ |
29 |
| - if (trigger_time_cycles - last_trigger_time_cycles > DEBOUNCE_INTERVAL_CYCLES) { |
30 |
| - pulse_count++; |
31 |
| - last_trigger_time_cycles = trigger_time_cycles; |
32 |
| - } |
33 |
| - |
34 |
| - if (pulse_count % CONFIG_EXAMPLE_PULSE_COUNT_WAKEUP_LIMIT == 0) { |
35 |
| - lp_core_printf("Pulse count: %d, wake-up main CPU\n", pulse_count); |
36 |
| - ulp_lp_core_wakeup_main_processor(); |
37 |
| - } |
38 |
| - |
39 |
| -} |
40 |
| - |
41 | 11 |
|
42 | 12 |
|
43 | 13 | int main (void)
|
44 | 14 | {
|
45 |
| - lp_core_printf("LP Core pulse counter started\n"); |
46 |
| - ulp_lp_core_intr_enable(); |
47 |
| - ulp_lp_core_gpio_intr_enable(CONFIG_EXAMPLE_PULSE_COUNT_PIN, LP_IO_INTR_POSEDGE); |
48 |
| - |
49 |
| - while(1) { |
| 15 | + ulp_lp_core_wakeup_main_processor(); |
50 | 16 |
|
51 |
| -#if CONFIG_EXAMPLE_PULSE_COUNT_SIMULATE |
52 |
| - /* No external device connected to generate pulses, we simulate them ourselves instead */ |
53 |
| - ulp_lp_core_delay_us(SIMULATED_PULSE_DELAY_US); |
54 |
| - ulp_lp_core_gpio_set_level(CONFIG_EXAMPLE_PULSE_COUNT_PIN, 1); |
55 |
| - ulp_lp_core_delay_us(SIMULATED_PULSE_DELAY_US); |
56 |
| - ulp_lp_core_gpio_set_level(CONFIG_EXAMPLE_PULSE_COUNT_PIN, 0); |
57 |
| -#else |
58 |
| - /* Put CPU into a wait state to reduce power consumption while waiting for pulses */ |
59 |
| - ulp_lp_core_wait_for_intr(); |
60 |
| -#endif //CONFIG_EXAMPLE_PULSE_COUNT_SIMULATE |
61 |
| - } |
| 17 | + ulp_lp_core_gpio_clear_intr_status(); |
62 | 18 |
|
63 | 19 | return 0;
|
64 | 20 | }
|
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