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temporary fix for OpenOCD until complete refactoring of tl-install for all components (#159)
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+146
-179
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12 files changed

+146
-179
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boards/esp32-c5-devkitc-1.json

Lines changed: 31 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,31 @@
1+
{
2+
"build": {
3+
"core": "esp32",
4+
"f_cpu": "240000000L",
5+
"f_flash": "80000000L",
6+
"flash_mode": "qio",
7+
"mcu": "esp32c5",
8+
"variant": "esp32c5"
9+
},
10+
"connectivity": [
11+
"bluetooth",
12+
"wifi"
13+
],
14+
"debug": {
15+
"openocd_target": "esp32c5.cfg"
16+
},
17+
"frameworks": [
18+
"arduino",
19+
"espidf"
20+
],
21+
"name": "Espressif ESP32-C5-DevKitC-1 4MB no PSRAM",
22+
"upload": {
23+
"flash_size": "4MB",
24+
"maximum_ram_size": 327680,
25+
"maximum_size": 4194304,
26+
"require_upload_port": true,
27+
"speed": 460800
28+
},
29+
"url": "https://docs.espressif.com/projects/esp-dev-kits/en/latest/esp32c5/esp32-c5-devkitc-1/user_guide.html",
30+
"vendor": "Espressif"
31+
}

builder/frameworks/_embed_files.py

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -110,14 +110,14 @@ def transform_to_asm(target, source, env):
110110
" ".join(
111111
[
112112
"riscv32-esp-elf-objcopy"
113-
if mcu in ("esp32c2","esp32c3","esp32c6","esp32h2","esp32p4")
113+
if mcu in ("esp32c2","esp32c3","esp32c5","esp32c6","esp32h2","esp32p4")
114114
else "xtensa-%s-elf-objcopy" % mcu,
115115
"--input-target",
116116
"binary",
117117
"--output-target",
118-
"elf32-littleriscv" if mcu in ("esp32c2","esp32c3","esp32c6","esp32h2","esp32p4") else "elf32-xtensa-le",
118+
"elf32-littleriscv" if mcu in ("esp32c2","esp32c3","esp32c5","esp32c6","esp32h2","esp32p4") else "elf32-xtensa-le",
119119
"--binary-architecture",
120-
"riscv" if mcu in ("esp32c2","esp32c3","esp32c6","esp32h2","esp32p4") else "xtensa",
120+
"riscv" if mcu in ("esp32c2","esp32c3","esp32c5","esp32c6","esp32h2","esp32p4") else "xtensa",
121121
"--rename-section",
122122
".data=.rodata.embedded",
123123
"$SOURCE",

builder/main.py

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -235,7 +235,7 @@ def __fetch_fs_size(target, source, env):
235235
mcu = board.get("build.mcu", "esp32")
236236
toolchain_arch = "xtensa-%s" % mcu
237237
filesystem = board.get("build.filesystem", "spiffs")
238-
if mcu in ("esp32c2", "esp32c3", "esp32c6", "esp32h2", "esp32p4"):
238+
if mcu in ("esp32c2", "esp32c3", "esp32c5", "esp32c6", "esp32h2", "esp32p4"):
239239
toolchain_arch = "riscv32-esp"
240240

241241
if "INTEGRATION_EXTRA_DATA" not in env:
@@ -256,7 +256,7 @@ def __fetch_fs_size(target, source, env):
256256
GDB=join(
257257
platform.get_package_dir(
258258
"riscv32-esp-elf-gdb"
259-
if mcu in ("esp32c2", "esp32c3", "esp32c6", "esp32h2", "esp32p4")
259+
if mcu in ("esp32c2", "esp32c3", "esp32c5", "esp32c6", "esp32h2", "esp32p4")
260260
else "xtensa-esp-elf-gdb"
261261
)
262262
or "",
@@ -547,7 +547,7 @@ def check_lib_archive_exists():
547547
f.replace(
548548
"$PACKAGE_DIR",
549549
_to_unix_slashes(
550-
platform.get_package_dir("tool-openocd") or ""))
550+
platform.get_package_dir("tool-openocd-esp32") or ""))
551551
for f in openocd_args
552552
]
553553
env.Replace(

examples/espidf-ulp-lp/CMakeLists.txt

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
11
cmake_minimum_required(VERSION 3.16)
22

33
include($ENV{IDF_PATH}/tools/cmake/project.cmake)
4-
project(lp_core_pulse_counter)
4+
project(lp_core_gpio_wake_up_example)

examples/espidf-ulp-lp/README.md

Lines changed: 14 additions & 39 deletions
Original file line numberDiff line numberDiff line change
@@ -1,51 +1,26 @@
1-
| Supported Targets | ESP32-C6 |
2-
| ----------------- | -------- |
1+
| Supported Targets | ESP32-C5 | ESP32-C6 | ESP32-P4 |
2+
| ----------------- | -------- | -------- | -------- |
3+
# ULP-LP-Core simple example with GPIO Interrupt:
34

4-
This example demonstrates how to program the ULP Core coprocessor to count pulses on an IO while the main CPUs are either running some other code or are in deep sleep. See the README.md file in the upper level 'examples' directory for more information about examples.
5+
This example demonstrates how to program the LP-Core coprocessor to wake up from a RTC IO interrupt, instead of waking periodically from the ULP timer.
56

6-
At runtime, the main code running on the ESP (found in lp_core_pulse_counter_example_main.c) loads ULP program into the `RTC_SLOW_MEM` memory region using `ulp_lp_core_load_binary` function. Main code configures the ULP program by setting up values of some variables and then starts it using `ulp_lp_core_run`. Once the ULP program is started, it monitors the IO pin for pulses.
7+
ULP program written in C can be found across `ulp/main.c`. The build system compiles and links this program, converts it into binary format, and embeds it into the .rodata section of the ESP-IDF application.
78

8-
When the ULP program finds an edge in the input signal, it performs debouncing and increments the variable maintaining the total edge count. Once the edge count reaches certain value, ULP triggers wake up from deep sleep. Note that the ULP program keeps running and monitoring the input signal even when the SoC is woken up.
9+
At runtime, the main code running on the ESP (found in lp_core_gpio_wake_up_example_main.c) loads ULP program into the `RTC_SLOW_MEM` memory region using `ulp_lp_core_load_binary` function. The main code then configures the ULP GPIO wakeup source and starts the coprocessor by using `ulp_lp_core_run` followed by putting the chip into deep sleep mode.
910

10-
### Hardware Required
11+
When the wakeup source pin is pulled low the LP-Core coprocessor is woken up, sends a wakeup signal to the main CPU and goes back to sleep again.
1112

12-
To run this example, you should have a development board based on any of the chips listed in the supported targets table at the top and a host machine with a serial input connection.
13+
In this example the input signal is connected to GPIO2. To change the pin number, check the Chip Pin List document and adjust `WAKEUP_PIN` variable in main.c.
1314

14-
#### Pin Assignment:
1515

16-
**Note:** The following pin assignments are used by default.
16+
## Example output
1717

18-
19-
| | Uart Tx | Pulse Count Input |
20-
| ----------------------- | ------- | ----------------- |
21-
| ESP32-C6 | GPIO5 | GPIO6 |
22-
| Host machine | Rx | N/A |
23-
24-
25-
## Example Output
26-
27-
The log output from the serial monitor connected to the main core should indicate that the LP core and the LP UART peripheral have been successfully initialized. The main CPU would then enter deep sleep mode.
28-
29-
```bash
30-
Using pin 6 as pulse counter input
31-
ULP will wake up processor after every 10 pulses
32-
Not a ULP wakeup, initializing it!
33-
Entering in deep sleep
34-
...
35-
rst:0x5 (SLEEP_WAKEUP),boot:0xc (SPI_FAST_FLASH_BOOT)
36-
...
37-
ULP woke up the main CPU!
38-
Pulse count: 11
39-
Entering in deep sleep
4018
```
19+
Not a LP-Core wakeup, initializing it!
20+
Entering deep sleep
4121
42-
The log output from the serial monitor connected to the LP core should display output as below -
22+
...
4323
44-
```bash
45-
LP Core pulse counter started
46-
Pulse count: 10, wake-up main CPU
24+
LP-Core woke up the main CPU!
25+
Entering deep sleep
4726
```
48-
49-
## Troubleshooting
50-
51-
(For any technical queries, please open an [issue](https://github.com/espressif/esp-idf/issues) on GitHub. We will get back to you as soon as possible.)

examples/espidf-ulp-lp/pytest_lp_core_pcnt.py

Lines changed: 0 additions & 30 deletions
This file was deleted.

examples/espidf-ulp-lp/src/CMakeLists.txt

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
idf_component_register(SRCS "lp_core_pulse_counter_example_main.c"
1+
idf_component_register(SRCS "lp_core_gpio_wake_up_example_main.c"
22
INCLUDE_DIRS ".")
33

44
#
@@ -15,7 +15,7 @@ set(ulp_sources "../ulp/main.c")
1515
#
1616
# 3. List all the component source files which include automatically
1717
# generated ULP export file, ${ulp_app_name}.h:
18-
set(ulp_exp_dep_srcs "lp_core_pulse_counter_example_main.c")
18+
set(ulp_exp_dep_srcs "lp_core_gpio_wake_up_example_main.c")
1919

2020
#
2121
# 4. Call function to build ULP binary and embed in project using the argument

examples/espidf-ulp-lp/src/Kconfig.projbuild

Lines changed: 0 additions & 20 deletions
This file was deleted.

examples/espidf-ulp-lp/src/lp_core_pulse_counter_example_main.c renamed to examples/espidf-ulp-lp/src/lp_core_gpio_wake_up_example_main.c

Lines changed: 25 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
33
*
44
* SPDX-License-Identifier: Unlicense OR CC0-1.0
55
*/
6-
/* LP core gpio example
6+
/* ULP LP-Core GPIO wake-up example
77
88
This example code is in the Public Domain (or CC0 licensed, at your option.)
99
@@ -13,22 +13,30 @@
1313
*/
1414

1515
#include <stdio.h>
16-
#include <inttypes.h>
1716
#include "esp_sleep.h"
18-
#include "driver/gpio.h"
1917
#include "driver/rtc_io.h"
20-
#include "freertos/FreeRTOS.h"
21-
#include "freertos/task.h"
2218
#include "ulp_lp_core.h"
2319
#include "ulp_main.h"
24-
#include "lp_core_uart.h"
20+
#include "freertos/FreeRTOS.h"
21+
#include "freertos/task.h"
22+
23+
#define WAKEUP_PIN 2
2524

2625
extern const uint8_t ulp_main_bin_start[] asm("_binary_ulp_main_bin_start");
2726
extern const uint8_t ulp_main_bin_end[] asm("_binary_ulp_main_bin_end");
2827

29-
3028
static void init_ulp_program(void);
3129

30+
static void wakeup_gpio_init(void)
31+
{
32+
/* Configure the button GPIO as input, enable wakeup */
33+
rtc_gpio_init(WAKEUP_PIN);
34+
rtc_gpio_set_direction(WAKEUP_PIN, RTC_GPIO_MODE_INPUT_ONLY);
35+
rtc_gpio_pulldown_dis(WAKEUP_PIN);
36+
rtc_gpio_pullup_en(WAKEUP_PIN);
37+
rtc_gpio_wakeup_enable(WAKEUP_PIN, GPIO_INTR_NEGEDGE);
38+
}
39+
3240
void app_main(void)
3341
{
3442
/* If user is using USB-serial-jtag then idf monitor needs some time to
@@ -38,46 +46,39 @@ void app_main(void)
3846
*/
3947
vTaskDelay(pdMS_TO_TICKS(1000));
4048

41-
/* Initialize selected GPIO as RTC IO, enable input/output, disable pullup and pulldown */
42-
printf("Using pin %d as pulse counter input\n", CONFIG_EXAMPLE_PULSE_COUNT_PIN);
43-
rtc_gpio_init(CONFIG_EXAMPLE_PULSE_COUNT_PIN);
44-
rtc_gpio_set_direction(CONFIG_EXAMPLE_PULSE_COUNT_PIN, RTC_GPIO_MODE_INPUT_OUTPUT);
45-
rtc_gpio_pulldown_dis(CONFIG_EXAMPLE_PULSE_COUNT_PIN);
46-
rtc_gpio_pullup_dis(CONFIG_EXAMPLE_PULSE_COUNT_PIN);
47-
48-
printf("ULP will wake up processor after every %d pulses\n", CONFIG_EXAMPLE_PULSE_COUNT_WAKEUP_LIMIT);
49+
wakeup_gpio_init();
4950

5051
esp_sleep_wakeup_cause_t cause = esp_sleep_get_wakeup_cause();
5152
/* not a wakeup from ULP, load the firmware */
5253
if (cause != ESP_SLEEP_WAKEUP_ULP) {
5354
printf("Not a ULP wakeup, initializing it! \n");
5455
init_ulp_program();
55-
} else {
56-
printf("ULP woke up the main CPU!\n");
57-
printf("Pulse count: %"PRIu32"\n", ulp_pulse_count);
56+
}
57+
58+
/* ULP read and detected a change in WAKEUP_PIN, prints */
59+
if (cause == ESP_SLEEP_WAKEUP_ULP) {
60+
printf("ULP woke up the main CPU! \n");
5861
}
5962

6063
/* Go back to sleep, only the ULP will run */
61-
printf("Entering in deep sleep\n\n");
64+
printf("Entering deep sleep\n\n");
6265

6366
/* Small delay to ensure the messages are printed */
67+
vTaskDelay(100 / portTICK_PERIOD_MS);
68+
6469
ESP_ERROR_CHECK( esp_sleep_enable_ulp_wakeup());
6570

6671
esp_deep_sleep_start();
6772
}
6873

6974
static void init_ulp_program(void)
7075
{
71-
lp_core_uart_cfg_t uart_cfg = LP_CORE_UART_DEFAULT_CONFIG();
72-
73-
ESP_ERROR_CHECK(lp_core_uart_init(&uart_cfg));
74-
7576
esp_err_t err = ulp_lp_core_load_binary(ulp_main_bin_start, (ulp_main_bin_end - ulp_main_bin_start));
7677
ESP_ERROR_CHECK(err);
7778

7879
/* Start the program */
7980
ulp_lp_core_cfg_t cfg = {
80-
.wakeup_source = ULP_LP_CORE_WAKEUP_SOURCE_HP_CPU,
81+
.wakeup_source = ULP_LP_CORE_WAKEUP_SOURCE_LP_IO,
8182
};
8283

8384
err = ulp_lp_core_run(&cfg);

examples/espidf-ulp-lp/ulp/main.c

Lines changed: 2 additions & 46 deletions
Original file line numberDiff line numberDiff line change
@@ -5,60 +5,16 @@
55
*/
66
#include <stdint.h>
77
#include <stdbool.h>
8-
#include "sdkconfig.h"
98
#include "ulp_lp_core.h"
109
#include "ulp_lp_core_utils.h"
1110
#include "ulp_lp_core_gpio.h"
12-
#include "ulp_lp_core_interrupts.h"
13-
#include "ulp_lp_core_print.h"
14-
#include "riscv/csr.h"
15-
16-
#define DEBOUNCE_INTERVAL_CYCLES 10 // 10 cycles is about 0.625 us at 16 MHz
17-
18-
#define SIMULATED_PULSE_FREQUENCY_HZ 2
19-
#define SIMULATED_PULSE_DELAY_US (1000000 / SIMULATED_PULSE_FREQUENCY_HZ) / 2
20-
21-
uint32_t pulse_count;
22-
static uint32_t last_trigger_time_cycles;
23-
24-
void LP_CORE_ISR_ATTR ulp_lp_core_lp_io_intr_handler(void)
25-
{
26-
ulp_lp_core_gpio_clear_intr_status();
27-
uint32_t trigger_time_cycles = RV_READ_CSR(mcycle);
28-
/* Do some simple debouncing, do not count spurious pulses */
29-
if (trigger_time_cycles - last_trigger_time_cycles > DEBOUNCE_INTERVAL_CYCLES) {
30-
pulse_count++;
31-
last_trigger_time_cycles = trigger_time_cycles;
32-
}
33-
34-
if (pulse_count % CONFIG_EXAMPLE_PULSE_COUNT_WAKEUP_LIMIT == 0) {
35-
lp_core_printf("Pulse count: %d, wake-up main CPU\n", pulse_count);
36-
ulp_lp_core_wakeup_main_processor();
37-
}
38-
39-
}
40-
4111

4212

4313
int main (void)
4414
{
45-
lp_core_printf("LP Core pulse counter started\n");
46-
ulp_lp_core_intr_enable();
47-
ulp_lp_core_gpio_intr_enable(CONFIG_EXAMPLE_PULSE_COUNT_PIN, LP_IO_INTR_POSEDGE);
48-
49-
while(1) {
15+
ulp_lp_core_wakeup_main_processor();
5016

51-
#if CONFIG_EXAMPLE_PULSE_COUNT_SIMULATE
52-
/* No external device connected to generate pulses, we simulate them ourselves instead */
53-
ulp_lp_core_delay_us(SIMULATED_PULSE_DELAY_US);
54-
ulp_lp_core_gpio_set_level(CONFIG_EXAMPLE_PULSE_COUNT_PIN, 1);
55-
ulp_lp_core_delay_us(SIMULATED_PULSE_DELAY_US);
56-
ulp_lp_core_gpio_set_level(CONFIG_EXAMPLE_PULSE_COUNT_PIN, 0);
57-
#else
58-
/* Put CPU into a wait state to reduce power consumption while waiting for pulses */
59-
ulp_lp_core_wait_for_intr();
60-
#endif //CONFIG_EXAMPLE_PULSE_COUNT_SIMULATE
61-
}
17+
ulp_lp_core_gpio_clear_intr_status();
6218

6319
return 0;
6420
}

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