Skip to content

Commit 3eedb9e

Browse files
valerosvaleros
committed
Update STM32Cube example with custom startup code
1 parent d2046f7 commit 3eedb9e

File tree

2 files changed

+363
-2
lines changed

2 files changed

+363
-2
lines changed

‎examples/stm32cube-hal-eeprom-emulation/platformio.ini

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -11,6 +11,5 @@
1111
platform = ststm32
1212
framework = stm32cube
1313
board = nucleo_f103rb
14-
build_flags = -Wl,-Map=system_stm32f1xx.txt
14+
build_flags = -Wl,--fatal-warnings
1515
board_build.stm32cube.custom_system_setup = yes
16-
; board_build.stm32cube.custom_config_header = yes

‎examples/stm32cube-hal-eeprom-emulation/src/startup_stm32f103xb.S

Lines changed: 362 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,362 @@
1+
/**
2+
*************** (C) COPYRIGHT 2017 STMicroelectronics ************************
3+
* @file startup_stm32f103xb.s
4+
* @author MCD Application Team
5+
* @brief STM32F103xB Devices vector table for Atollic toolchain.
6+
* This module performs:
7+
* - Set the initial SP
8+
* - Set the initial PC == Reset_Handler,
9+
* - Set the vector table entries with the exceptions ISR address
10+
* - Configure the clock system
11+
* - Branches to main in the C library (which eventually
12+
* calls main()).
13+
* After Reset the Cortex-M3 processor is in Thread mode,
14+
* priority is Privileged, and the Stack is set to Main.
15+
******************************************************************************
16+
* @attention
17+
*
18+
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
19+
* All rights reserved.</center></h2>
20+
*
21+
* This software component is licensed by ST under BSD 3-Clause license,
22+
* the "License"; You may not use this file except in compliance with the
23+
* License. You may obtain a copy of the License at:
24+
* opensource.org/licenses/BSD-3-Clause
25+
*
26+
******************************************************************************
27+
*/
28+
29+
.syntax unified
30+
.cpu cortex-m3
31+
.fpu softvfp
32+
.thumb
33+
34+
.global g_pfnVectors
35+
.global Default_Handler
36+
37+
/* start address for the initialization values of the .data section.
38+
defined in linker script */
39+
.word _sidata
40+
/* start address for the .data section. defined in linker script */
41+
.word _sdata
42+
/* end address for the .data section. defined in linker script */
43+
.word _edata
44+
/* start address for the .bss section. defined in linker script */
45+
.word _sbss
46+
/* end address for the .bss section. defined in linker script */
47+
.word _ebss
48+
49+
.equ BootRAM, 0xF108F85F
50+
/**
51+
* @brief This is the code that gets called when the processor first
52+
* starts execution following a reset event. Only the absolutely
53+
* necessary set is performed, after which the application
54+
* supplied main() routine is called.
55+
* @param None
56+
* @retval : None
57+
*/
58+
59+
.section .text.Reset_Handler
60+
.weak Reset_Handler
61+
.type Reset_Handler, %function
62+
Reset_Handler:
63+
64+
/* Copy the data segment initializers from flash to SRAM */
65+
movs r1, #0
66+
b LoopCopyDataInit
67+
68+
CopyDataInit:
69+
ldr r3, =_sidata
70+
ldr r3, [r3, r1]
71+
str r3, [r0, r1]
72+
adds r1, r1, #4
73+
74+
LoopCopyDataInit:
75+
ldr r0, =_sdata
76+
ldr r3, =_edata
77+
adds r2, r0, r1
78+
cmp r2, r3
79+
bcc CopyDataInit
80+
ldr r2, =_sbss
81+
b LoopFillZerobss
82+
/* Zero fill the bss segment. */
83+
FillZerobss:
84+
movs r3, #0
85+
str r3, [r2], #4
86+
87+
LoopFillZerobss:
88+
ldr r3, = _ebss
89+
cmp r2, r3
90+
bcc FillZerobss
91+
92+
/* Call the clock system intitialization function.*/
93+
bl SystemInit
94+
/* Call static constructors */
95+
bl __libc_init_array
96+
/* Call the application's entry point.*/
97+
bl main
98+
bx lr
99+
.size Reset_Handler, .-Reset_Handler
100+
101+
/**
102+
* @brief This is the code that gets called when the processor receives an
103+
* unexpected interrupt. This simply enters an infinite loop, preserving
104+
* the system state for examination by a debugger.
105+
*
106+
* @param None
107+
* @retval : None
108+
*/
109+
.section .text.Default_Handler,"ax",%progbits
110+
Default_Handler:
111+
Infinite_Loop:
112+
b Infinite_Loop
113+
.size Default_Handler, .-Default_Handler
114+
/******************************************************************************
115+
*
116+
* The minimal vector table for a Cortex M3. Note that the proper constructs
117+
* must be placed on this to ensure that it ends up at physical address
118+
* 0x0000.0000.
119+
*
120+
******************************************************************************/
121+
.section .isr_vector,"a",%progbits
122+
.type g_pfnVectors, %object
123+
.size g_pfnVectors, .-g_pfnVectors
124+
125+
126+
g_pfnVectors:
127+
128+
.word _estack
129+
.word Reset_Handler
130+
.word NMI_Handler
131+
.word HardFault_Handler
132+
.word MemManage_Handler
133+
.word BusFault_Handler
134+
.word UsageFault_Handler
135+
.word 0
136+
.word 0
137+
.word 0
138+
.word 0
139+
.word SVC_Handler
140+
.word DebugMon_Handler
141+
.word 0
142+
.word PendSV_Handler
143+
.word SysTick_Handler
144+
.word WWDG_IRQHandler
145+
.word PVD_IRQHandler
146+
.word TAMPER_IRQHandler
147+
.word RTC_IRQHandler
148+
.word FLASH_IRQHandler
149+
.word RCC_IRQHandler
150+
.word EXTI0_IRQHandler
151+
.word EXTI1_IRQHandler
152+
.word EXTI2_IRQHandler
153+
.word EXTI3_IRQHandler
154+
.word EXTI4_IRQHandler
155+
.word DMA1_Channel1_IRQHandler
156+
.word DMA1_Channel2_IRQHandler
157+
.word DMA1_Channel3_IRQHandler
158+
.word DMA1_Channel4_IRQHandler
159+
.word DMA1_Channel5_IRQHandler
160+
.word DMA1_Channel6_IRQHandler
161+
.word DMA1_Channel7_IRQHandler
162+
.word ADC1_2_IRQHandler
163+
.word USB_HP_CAN1_TX_IRQHandler
164+
.word USB_LP_CAN1_RX0_IRQHandler
165+
.word CAN1_RX1_IRQHandler
166+
.word CAN1_SCE_IRQHandler
167+
.word EXTI9_5_IRQHandler
168+
.word TIM1_BRK_IRQHandler
169+
.word TIM1_UP_IRQHandler
170+
.word TIM1_TRG_COM_IRQHandler
171+
.word TIM1_CC_IRQHandler
172+
.word TIM2_IRQHandler
173+
.word TIM3_IRQHandler
174+
.word TIM4_IRQHandler
175+
.word I2C1_EV_IRQHandler
176+
.word I2C1_ER_IRQHandler
177+
.word I2C2_EV_IRQHandler
178+
.word I2C2_ER_IRQHandler
179+
.word SPI1_IRQHandler
180+
.word SPI2_IRQHandler
181+
.word USART1_IRQHandler
182+
.word USART2_IRQHandler
183+
.word USART3_IRQHandler
184+
.word EXTI15_10_IRQHandler
185+
.word RTC_Alarm_IRQHandler
186+
.word USBWakeUp_IRQHandler
187+
.word 0
188+
.word 0
189+
.word 0
190+
.word 0
191+
.word 0
192+
.word 0
193+
.word 0
194+
.word BootRAM /* @0x108. This is for boot in RAM mode for
195+
STM32F10x Medium Density devices. */
196+
197+
/*******************************************************************************
198+
*
199+
* Provide weak aliases for each Exception handler to the Default_Handler.
200+
* As they are weak aliases, any function with the same name will override
201+
* this definition.
202+
*
203+
*******************************************************************************/
204+
205+
.weak NMI_Handler
206+
.thumb_set NMI_Handler,Default_Handler
207+
208+
.weak HardFault_Handler
209+
.thumb_set HardFault_Handler,Default_Handler
210+
211+
.weak MemManage_Handler
212+
.thumb_set MemManage_Handler,Default_Handler
213+
214+
.weak BusFault_Handler
215+
.thumb_set BusFault_Handler,Default_Handler
216+
217+
.weak UsageFault_Handler
218+
.thumb_set UsageFault_Handler,Default_Handler
219+
220+
.weak SVC_Handler
221+
.thumb_set SVC_Handler,Default_Handler
222+
223+
.weak DebugMon_Handler
224+
.thumb_set DebugMon_Handler,Default_Handler
225+
226+
.weak PendSV_Handler
227+
.thumb_set PendSV_Handler,Default_Handler
228+
229+
.weak SysTick_Handler
230+
.thumb_set SysTick_Handler,Default_Handler
231+
232+
.weak WWDG_IRQHandler
233+
.thumb_set WWDG_IRQHandler,Default_Handler
234+
235+
.weak PVD_IRQHandler
236+
.thumb_set PVD_IRQHandler,Default_Handler
237+
238+
.weak TAMPER_IRQHandler
239+
.thumb_set TAMPER_IRQHandler,Default_Handler
240+
241+
.weak RTC_IRQHandler
242+
.thumb_set RTC_IRQHandler,Default_Handler
243+
244+
.weak FLASH_IRQHandler
245+
.thumb_set FLASH_IRQHandler,Default_Handler
246+
247+
.weak RCC_IRQHandler
248+
.thumb_set RCC_IRQHandler,Default_Handler
249+
250+
.weak EXTI0_IRQHandler
251+
.thumb_set EXTI0_IRQHandler,Default_Handler
252+
253+
.weak EXTI1_IRQHandler
254+
.thumb_set EXTI1_IRQHandler,Default_Handler
255+
256+
.weak EXTI2_IRQHandler
257+
.thumb_set EXTI2_IRQHandler,Default_Handler
258+
259+
.weak EXTI3_IRQHandler
260+
.thumb_set EXTI3_IRQHandler,Default_Handler
261+
262+
.weak EXTI4_IRQHandler
263+
.thumb_set EXTI4_IRQHandler,Default_Handler
264+
265+
.weak DMA1_Channel1_IRQHandler
266+
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
267+
268+
.weak DMA1_Channel2_IRQHandler
269+
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
270+
271+
.weak DMA1_Channel3_IRQHandler
272+
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
273+
274+
.weak DMA1_Channel4_IRQHandler
275+
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
276+
277+
.weak DMA1_Channel5_IRQHandler
278+
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
279+
280+
.weak DMA1_Channel6_IRQHandler
281+
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
282+
283+
.weak DMA1_Channel7_IRQHandler
284+
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
285+
286+
.weak ADC1_2_IRQHandler
287+
.thumb_set ADC1_2_IRQHandler,Default_Handler
288+
289+
.weak USB_HP_CAN1_TX_IRQHandler
290+
.thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
291+
292+
.weak USB_LP_CAN1_RX0_IRQHandler
293+
.thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
294+
295+
.weak CAN1_RX1_IRQHandler
296+
.thumb_set CAN1_RX1_IRQHandler,Default_Handler
297+
298+
.weak CAN1_SCE_IRQHandler
299+
.thumb_set CAN1_SCE_IRQHandler,Default_Handler
300+
301+
.weak EXTI9_5_IRQHandler
302+
.thumb_set EXTI9_5_IRQHandler,Default_Handler
303+
304+
.weak TIM1_BRK_IRQHandler
305+
.thumb_set TIM1_BRK_IRQHandler,Default_Handler
306+
307+
.weak TIM1_UP_IRQHandler
308+
.thumb_set TIM1_UP_IRQHandler,Default_Handler
309+
310+
.weak TIM1_TRG_COM_IRQHandler
311+
.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
312+
313+
.weak TIM1_CC_IRQHandler
314+
.thumb_set TIM1_CC_IRQHandler,Default_Handler
315+
316+
.weak TIM2_IRQHandler
317+
.thumb_set TIM2_IRQHandler,Default_Handler
318+
319+
.weak TIM3_IRQHandler
320+
.thumb_set TIM3_IRQHandler,Default_Handler
321+
322+
.weak TIM4_IRQHandler
323+
.thumb_set TIM4_IRQHandler,Default_Handler
324+
325+
.weak I2C1_EV_IRQHandler
326+
.thumb_set I2C1_EV_IRQHandler,Default_Handler
327+
328+
.weak I2C1_ER_IRQHandler
329+
.thumb_set I2C1_ER_IRQHandler,Default_Handler
330+
331+
.weak I2C2_EV_IRQHandler
332+
.thumb_set I2C2_EV_IRQHandler,Default_Handler
333+
334+
.weak I2C2_ER_IRQHandler
335+
.thumb_set I2C2_ER_IRQHandler,Default_Handler
336+
337+
.weak SPI1_IRQHandler
338+
.thumb_set SPI1_IRQHandler,Default_Handler
339+
340+
.weak SPI2_IRQHandler
341+
.thumb_set SPI2_IRQHandler,Default_Handler
342+
343+
.weak USART1_IRQHandler
344+
.thumb_set USART1_IRQHandler,Default_Handler
345+
346+
.weak USART2_IRQHandler
347+
.thumb_set USART2_IRQHandler,Default_Handler
348+
349+
.weak USART3_IRQHandler
350+
.thumb_set USART3_IRQHandler,Default_Handler
351+
352+
.weak EXTI15_10_IRQHandler
353+
.thumb_set EXTI15_10_IRQHandler,Default_Handler
354+
355+
.weak RTC_Alarm_IRQHandler
356+
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
357+
358+
.weak USBWakeUp_IRQHandler
359+
.thumb_set USBWakeUp_IRQHandler,Default_Handler
360+
361+
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
362+

0 commit comments

Comments
 (0)