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Fix formatting compiler warnings
Signed-off-by: Ronald Caesar <github43132@proton.me>
1 parent e475706 commit d6c29e4

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6 files changed

+102
-92
lines changed

6 files changed

+102
-92
lines changed

CMakeLists.txt

Lines changed: 8 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -101,8 +101,8 @@ add_subdirectory(3rd_Party)
101101
add_subdirectory(src/common)
102102
add_subdirectory(src/host)
103103
add_subdirectory(src/jit)
104-
add_subdirectory(src/pvm)
105-
add_subdirectory(src/targets/switch1/hardware)
104+
#add_subdirectory(src/pvm)
105+
#add_subdirectory(src/targets/switch1/hardware)
106106

107107
#--------------------------------
108108
# ---- Target Configurations ----
@@ -111,7 +111,7 @@ add_subdirectory(src/targets/switch1/hardware)
111111
include(TestBigEndian)
112112
TEST_BIG_ENDIAN(WORDS_BIGENDIAN)
113113

114-
list(APPEND POUND_PROJECT_TARGETS common host pvm jit)
114+
list(APPEND POUND_PROJECT_TARGETS common host jit)
115115
foreach(TARGET ${POUND_PROJECT_TARGETS})
116116
# Apply Endianness definitions to all our targets.
117117
if(WORDS_BIGENDIAN)
@@ -123,6 +123,7 @@ foreach(TARGET ${POUND_PROJECT_TARGETS})
123123
$<$<CXX_COMPILER_ID:GNU,Clang>:
124124
-Wall
125125
-Wpedantic
126+
-Wextra
126127
-Wshadow
127128
-Wpointer-arith
128129
-Wcast-qual
@@ -152,11 +153,11 @@ target_link_libraries(Pound PRIVATE
152153
common
153154
host
154155
jit
155-
pvm
156+
#pvm
156157

157-
OpenGL::GL
158-
SDL3::SDL3
159-
imgui
158+
#OpenGL::GL
159+
#SDL3::SDL3
160+
#imgui
160161
)
161162

162163
set(TEST_SRC

src/jit/ir/instruction.cpp

Lines changed: 29 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -6,106 +6,105 @@
66
#include "common/logging.h"
77

88
namespace pound::jit::ir {
9-
10-
const value_t*
11-
instruction_get_arg (const instruction_t *instruction, const size_t arg_index)
9+
value_t *
10+
instruction_get_arg (instruction_t *instruction, size_t arg_index)
1211
{
1312
PVM_ASSERT(nullptr != instruction);
1413
PVM_ASSERT(arg_index < MAX_IR_ARGS);
1514

16-
const value_t *arg = &instruction->args[arg_index];
15+
value_t *arg = &instruction->args[arg_index];
1716
PVM_ASSERT(nullptr != arg);
1817
return arg;
1918
}
2019

21-
const uint64_t
22-
instruction_get_arg_u64(const instruction_t *instruction, const size_t arg_index)
20+
uint64_t
21+
instruction_get_arg_u64 (instruction_t *instruction, const size_t arg_index)
2322
{
2423
PVM_ASSERT(nullptr != instruction);
2524
PVM_ASSERT(arg_index < MAX_IR_ARGS);
2625

27-
const value_t* arg = instruction_get_arg(instruction, arg_index);
26+
value_t *arg = instruction_get_arg(instruction, arg_index);
2827
PVM_ASSERT(nullptr != arg);
2928

3029
PVM_ASSERT(IR_TYPE_U64 == arg->type);
31-
const uint64_t value = value_get_u64(arg);
30+
uint64_t value = value_get_u64(arg);
3231
return value;
3332
}
3433

35-
const uint32_t
36-
instruction_get_arg_u32(const instruction_t *instruction, const size_t arg_index)
34+
uint32_t
35+
instruction_get_arg_u32 (instruction_t *instruction, const size_t arg_index)
3736
{
3837
PVM_ASSERT(nullptr != instruction);
3938
PVM_ASSERT(arg_index < MAX_IR_ARGS);
4039

41-
const value_t* arg = instruction_get_arg(instruction, arg_index);
40+
value_t *arg = instruction_get_arg(instruction, arg_index);
4241
PVM_ASSERT(nullptr != arg);
4342

4443
PVM_ASSERT(IR_TYPE_U32 == arg->type);
45-
const uint32_t value = value_get_u32(arg);
44+
uint32_t value = value_get_u32(arg);
4645
return value;
4746
}
4847

49-
const uint8_t
50-
instruction_get_arg_u8(const instruction_t *instruction, const size_t arg_index)
48+
uint8_t
49+
instruction_get_arg_u8 (instruction_t *instruction, const size_t arg_index)
5150
{
5251
PVM_ASSERT(nullptr != instruction);
5352
PVM_ASSERT(arg_index < MAX_IR_ARGS);
5453

55-
const value_t* arg = instruction_get_arg(instruction, arg_index);
54+
value_t *arg = instruction_get_arg(instruction, arg_index);
5655
PVM_ASSERT(nullptr != arg);
5756

5857
PVM_ASSERT(IR_TYPE_U8 == arg->type);
59-
const uint8_t value = value_get_u8(arg);
58+
uint8_t value = value_get_u8(arg);
6059
return value;
6160
}
6261

63-
const bool
64-
instruction_get_arg_u1(const instruction_t *instruction, const size_t arg_index)
62+
bool
63+
instruction_get_arg_u1 (instruction_t *instruction, const size_t arg_index)
6564
{
6665
PVM_ASSERT(nullptr != instruction);
6766
PVM_ASSERT(arg_index < MAX_IR_ARGS);
6867

69-
const value_t* arg = instruction_get_arg(instruction, arg_index);
68+
value_t *arg = instruction_get_arg(instruction, arg_index);
7069
PVM_ASSERT(nullptr != arg);
7170

7271
PVM_ASSERT(IR_TYPE_U1 == arg->type);
73-
const uint8_t value = value_get_u1(arg);
72+
uint8_t value = value_get_u1(arg);
7473
return value;
7574
}
7675

77-
const pound::jit::a32_register_t
78-
instruction_get_arg_a32_register(const instruction_t *instruction, const size_t arg_index)
76+
pound::jit::a32_register_t
77+
instruction_get_arg_a32_register (instruction_t *instruction, const size_t arg_index)
7978
{
8079
PVM_ASSERT(nullptr != instruction);
8180
PVM_ASSERT(arg_index < MAX_IR_ARGS);
8281

83-
const value_t* arg = instruction_get_arg(instruction, arg_index);
82+
value_t *arg = instruction_get_arg(instruction, arg_index);
8483
PVM_ASSERT(nullptr != arg);
8584

8685
PVM_ASSERT(IR_TYPE_A32_REGISTER == arg->type);
87-
const pound::jit::a32_register_t value = value_get_a32_register(arg);
86+
pound::jit::a32_register_t value = value_get_a32_register(arg);
8887
return value;
8988
}
9089

91-
const type_t
92-
instruction_get_return_type (const instruction_t *instruction)
90+
type_t
91+
instruction_get_return_type (instruction_t *instruction)
9392
{
9493
PVM_ASSERT(nullptr != instruction);
9594
PVM_ASSERT(instruction->opcode < NUM_OPCODE);
9695

97-
const decoded_opcode_t *decoded_opcode = &g_opcodes[instruction->opcode];
96+
decoded_opcode_t *decoded_opcode = &g_opcodes[instruction->opcode];
9897
PVM_ASSERT(nullptr != decoded_opcode);
9998

10099
return decoded_opcode->type;
101100
}
102101

103-
const char*
104-
instruction_get_opcode_name(const instruction_t *instruction)
102+
const char *
103+
instruction_get_opcode_name (const instruction_t *instruction)
105104
{
106105
PVM_ASSERT(nullptr != instruction);
107106

108-
const decoded_opcode_t *decoded_opcode = &g_opcodes[instruction->opcode];
107+
decoded_opcode_t *decoded_opcode = &g_opcodes[instruction->opcode];
109108
PVM_ASSERT(nullptr != decoded_opcode);
110109

111110
const char *name = decoded_opcode->name;

src/jit/ir/instruction.h

Lines changed: 21 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -21,21 +21,21 @@ typedef struct instruction_t
2121
opcode_t opcode;
2222

2323
// An array of arguments for this instruction.
24-
value_t args[MAX_IR_ARGS];
24+
value_t args[MAX_IR_ARGS];
2525

2626
// Pointer to the next instruction in the intrusive list.
2727
struct instruction_t *next;
2828

29-
// Pointer to the previous instruction the intrusive list.
29+
// Pointer to the previous instruction the intrusive list.
3030
struct instruction_t *previous;
3131
} instruction_t;
3232

3333
/*!
3434
* @brief Represents a double-linked list of IR instructions.
3535
*
3636
* This structure holds the head and tail pointers of an intrusive list
37-
* composed of `instruction_t` nodes. It is used to store sequences
38-
*/
37+
* composed of `instruction_t` nodes. It is used to store sequences
38+
*/
3939
typedef struct
4040
{
4141
// Pointer to the first instruction in the list.
@@ -55,7 +55,7 @@ typedef struct
5555
* @pre `instruction` must not be NULL
5656
* @pre `arg_index` must be less than `MAX_IR_ARGS`.
5757
*/
58-
const value_t* instruction_get_arg (const instruction_t *instruction, const size_t arg_index);
58+
value_t *instruction_get_arg(instruction_t *instruction, size_t arg_index);
5959

6060
/*!
6161
* Retrieves a U64 argument from an instruction.
@@ -68,7 +68,7 @@ const value_t* instruction_get_arg (const instruction_t *instruction, const size
6868
* @pre `arg_index` must be less than `MAX_IR_ARGS`.
6969
* @pre The argument at `arg_index` must be of type `IR_TYPE_U64`.
7070
*/
71-
const uint64_t instruction_get_arg_u64(const instruction_t *instruction, const size_t arg_index);
71+
uint64_t instruction_get_arg_u64(instruction_t *instruction, size_t arg_index);
7272

7373
/*!
7474
* @brief Retrieves a U32 argument from an instruction.
@@ -81,7 +81,7 @@ const uint64_t instruction_get_arg_u64(const instruction_t *instruction, const s
8181
* @pre `arg_index` must be less than `MAX_IR_ARGS`.
8282
* @pre The argument at `arg_index` must be of type `IR_TYPE_U32`.
8383
*/
84-
const uint32_t instruction_get_arg_u32(const instruction_t *instruction, const size_t arg_index);
84+
uint32_t instruction_get_arg_u32(instruction_t *instruction, size_t arg_index);
8585

8686
/*!
8787
* Retrives a U8 argument from an instruction.
@@ -94,7 +94,7 @@ const uint32_t instruction_get_arg_u32(const instruction_t *instruction, const s
9494
* @pre `arg_index` must be less than `MAX_IR_ARGS`.
9595
* @pre The argument at `arg_index` must be of type `IR_TYPE_U8`.
9696
*/
97-
const uint8_t instruction_get_arg_u8(const instruction_t *instruction, const size_t arg_index);
97+
uint8_t instruction_get_arg_u8(instruction_t *instruction, size_t arg_index);
9898

9999
/*!
100100
* @brief Retrieves a U1 (boolean) argument from an instruction.
@@ -107,7 +107,7 @@ const uint8_t instruction_get_arg_u8(const instruction_t *instruction, const siz
107107
* @pre `arg_index` must be less than `MAX_IR_ARGS`.
108108
* @pre The argument at `arg_index` must be of type `IR_TYPE_U1`.
109109
*/
110-
const bool instruction_get_arg_u1(const instruction_t *instruction, const size_t arg_index);
110+
bool instruction_get_arg_u1(instruction_t *instruction, size_t arg_index);
111111

112112
/*!
113113
* @brief Retrieves an A32 register identifier argument from an instruction.
@@ -120,7 +120,8 @@ const bool instruction_get_arg_u1(const instruction_t *instruction, const size_t
120120
* @pre `arg_index` must be less than `MAX_IR_ARGS`.
121121
* @pre The argument at `arg_index` must be of type `IR_TYPE_A32_REGISTER`.
122122
*/
123-
const pound::jit::a32_register_t instruction_get_arg_a32_register(const instruction_t *instruction, const size_t arg_index);
123+
pound::jit::a32_register_t instruction_get_arg_a32_register(
124+
instruction_t *instruction, size_t arg_index);
124125

125126
/*!
126127
* @brief Gets the return type of an instruction based on its opcode.
@@ -129,10 +130,10 @@ const pound::jit::a32_register_t instruction_get_arg_a32_register(const instruct
129130
*
130131
* @return The `type_t` that this instruction's opcode returns.
131132
* @pre `instruction` must not be NULL.
132-
* @pre `instruction->opcode` must be a valid opcode index (less than `NUM_OPCODE`).
133+
* @pre `instruction->opcode` must be a valid opcode index (less than
134+
* `NUM_OPCODE`).
133135
*/
134-
const type_t instruction_get_return_type (const instruction_t *instruction);
135-
136+
type_t instruction_get_return_type(instruction_t *instruction);
136137

137138
/*!
138139
* @brief Gets the name of an instruction's opcode as a C-string.
@@ -141,10 +142,11 @@ const type_t instruction_get_return_type (const instruction_t *instruction);
141142
*
142143
* @return A constant C-string containing the opcode's name.
143144
* @pre `instruction` must not be NULL.
144-
* @pre `instruction->opcode` must be a valid opcode index (less than `NUM_OPCODE`).
145+
* @pre `instruction->opcode` must be a valid opcode index (less than
146+
* `NUM_OPCODE`).
145147
* @pre The global `g_opcodes` array must be initialized and accessible.
146148
*/
147-
const char* instruction_get_opcode_name(const instruction_t *instruction);
149+
const char *instruction_get_opcode_name(instruction_t *instruction);
148150

149151
/*!
150152
* @brief Appends an instruction to the tail of an instruction list.
@@ -158,7 +160,8 @@ const char* instruction_get_opcode_name(const instruction_t *instruction);
158160
* @pre `list` must not be NULL.
159161
* @pre `instruction` must not be NULL.
160162
*/
161-
void instruction_list_append (instruction_list_t *list, instruction_t *instruction);
163+
void instruction_list_append(instruction_list_t *list,
164+
instruction_t *instruction);
162165

163166
/*!
164167
* @brief Removes an instruction from an instruction list.
@@ -170,6 +173,7 @@ void instruction_list_append (instruction_list_t *list, instruction_t *instructi
170173
* @pre `instruction` must not be NULL.
171174
* @pre `instruction` must be a member of `list`.
172175
*/
173-
void instruction_list_remove (instruction_list_t *list, instruction_t *instruction);
176+
void instruction_list_remove(instruction_list_t *list,
177+
instruction_t *instruction);
174178
}
175179
#endif // POUND_JIT_IR_INSTRUCTION_H

src/jit/ir/type.h

Lines changed: 12 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -19,17 +19,18 @@ namespace pound::jit::ir {
1919
*/
2020
typedef enum
2121
{
22-
IR_TYPE_VOID = 0,
23-
IR_TYPE_U1 = 1 << 0,
24-
IR_TYPE_U8 = 1 << 1,
25-
IR_TYPE_U16 = 1 << 2,
26-
IR_TYPE_U32 = 1 << 3,
27-
IR_TYPE_U64 = 1 << 4,
28-
IR_TYPE_U128 = 1 << 5,
29-
IR_TYPE_A32_REGISTER = 1 << 6, // ARM32 GPR R0-R14
30-
IR_TYPE_A32_EXTENDED_REGISTER = 1 << 7, // ARM32 Extended Registers (e.g., for
31-
IR_TYPE_CONDITION = 1 << 9, // Condition codes
32-
IR_TYPE_MEMORY_ACCESS = 1 << 10, // Memory access type
22+
IR_TYPE_VOID = 0,
23+
IR_TYPE_U1 = 1 << 0,
24+
IR_TYPE_U8 = 1 << 1,
25+
IR_TYPE_U16 = 1 << 2,
26+
IR_TYPE_U32 = 1 << 3,
27+
IR_TYPE_U64 = 1 << 4,
28+
IR_TYPE_U128 = 1 << 5,
29+
IR_TYPE_A32_REGISTER = 1 << 6, // ARM32 GPR R0-R14
30+
IR_TYPE_A32_EXTENDED_REGISTER = 1
31+
<< 7, // ARM32 Extended Registers (e.g., for
32+
IR_TYPE_CONDITION = 1 << 9, // Condition codes
33+
IR_TYPE_MEMORY_ACCESS = 1 << 10, // Memory access type
3334
#if 0
3435
// VFP/NEON, or just R15 if treated specially)
3536
IR_TYPE_A32_CPSR = 1 << 8, // ARM32 CPSR/SPSR

src/jit/ir/value.cpp

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -52,7 +52,7 @@ void
5252
value_init_from_a32_register (value_t *p_value, const a32_register_t reg)
5353
{
5454
PVM_ASSERT(nullptr != p_value);
55-
p_value->type = IR_TYPE_A32_REGISTER;
55+
p_value->type = IR_TYPE_A32_REGISTER;
5656
p_value->inner.immediate_a32_register = reg;
5757
}
5858

@@ -62,35 +62,35 @@ value_init_from_a32_register (value_t *p_value, const a32_register_t reg)
6262
* ============================================================================
6363
*/
6464

65-
const uint64_t
65+
uint64_t
6666
value_get_u64 (const value_t *p_value)
67-
{
67+
{
6868
PVM_ASSERT(IR_TYPE_U64 == p_value->type);
6969
return p_value->inner.immediate_u64;
7070
}
7171

72-
const uint32_t
72+
uint32_t
7373
value_get_u32 (const value_t *p_value)
7474
{
7575
PVM_ASSERT(IR_TYPE_U32 == p_value->type);
7676
return p_value->inner.immediate_u32;
7777
}
7878

79-
const uint8_t
79+
uint8_t
8080
value_get_u8 (const value_t *p_value)
8181
{
8282
PVM_ASSERT(IR_TYPE_U8 == p_value->type);
8383
return p_value->inner.immediate_u8;
8484
}
8585

86-
const bool
86+
bool
8787
value_get_u1 (const value_t *p_value)
8888
{
8989
PVM_ASSERT(IR_TYPE_U1 == p_value->type);
9090
return p_value->inner.immediate_u1;
9191
}
9292

93-
const pound::jit::a32_register_t
93+
pound::jit::a32_register_t
9494
value_get_a32_register (const value_t *p_value)
9595
{
9696
PVM_ASSERT(IR_TYPE_A32_REGISTER == p_value->type);

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