@@ -1972,7 +1972,7 @@ struct PopulateNetlist : public TimingPatternInterpretor, public ast::ASTVisitor
19721972 for (auto chunk : latch_driven.chunks ()) {
19731973 RTLIL::SigSpec en = netlist.canvas ->addWire (netlist.new_id (), chunk.bitwidth ());
19741974 RTLIL::SigSpec staging = netlist.canvas ->addWire (netlist.new_id (), chunk.bitwidth ());
1975-
1975+
19761976 for (int i = 0 ; i < chunk.bitwidth (); i++) {
19771977 RTLIL::Cell *cell = netlist.canvas ->addDlatch (netlist.new_id (), en[i],
19781978 staging[i], netlist.convert_static (chunk[i]), true );
@@ -2230,6 +2230,7 @@ struct PopulateNetlist : public TimingPatternInterpretor, public ast::ASTVisitor
22302230 // blackboxes get special handling no matter the hierarchy mode
22312231 if (sym.isModule () && netlist.is_blackbox (sym.body .getDefinition ())) {
22322232 RTLIL::Cell *cell = netlist.canvas ->addCell (netlist.id (sym), RTLIL::escape_id (std::string (sym.body .name )));
2233+ cell->set_string_attribute (ID::hdlname, netlist.hdlname (sym));
22332234
22342235 for (auto *conn : sym.getPortConnections ()) {
22352236 switch (conn->port .kind ) {
@@ -2341,6 +2342,7 @@ struct PopulateNetlist : public TimingPatternInterpretor, public ast::ASTVisitor
23412342 auto [submodule, inserted] = queue.get_or_emplace (ref_body, netlist, *ref_body->parentInstance );
23422343
23432344 RTLIL::Cell *cell = netlist.canvas ->addCell (netlist.id (sym), module_type_id (*ref_body));
2345+ cell->set_string_attribute (ID::hdlname, netlist.hdlname (sym));
23442346 for (auto *conn : sym.getPortConnections ()) {
23452347 slang::SourceLocation loc;
23462348 if (auto expr = conn->getExpression ())
@@ -2560,6 +2562,7 @@ struct PopulateNetlist : public TimingPatternInterpretor, public ast::ASTVisitor
25602562
25612563 if (netlist.is_inferred_memory (sym)) {
25622564 RTLIL::Memory *m = new RTLIL::Memory;
2565+ m->set_string_attribute (ID::hdlname, netlist.hdlname (sym));
25632566 transfer_attrs (sym, m);
25642567 m->name = netlist.id (sym);
25652568 m->width = sym.getType ().getArrayElementType ()->getBitstreamWidth ();
@@ -2640,7 +2643,7 @@ struct PopulateNetlist : public TimingPatternInterpretor, public ast::ASTVisitor
26402643 } else {
26412644 auto wire = netlist.wire (sym);
26422645 log_assert (wire);
2643- wire->attributes [RTLIL:: ID::init] = const_;
2646+ wire->attributes [ID::init] = const_;
26442647 }
26452648 }
26462649 }
@@ -2691,7 +2694,8 @@ struct PopulateNetlist : public TimingPatternInterpretor, public ast::ASTVisitor
26912694 }
26922695
26932696 RTLIL::Cell *cell = netlist.canvas ->addCell (netlist.id (sym),
2694- id (sym.definitionName ));
2697+ id (sym.definitionName ));
2698+ cell->set_string_attribute (ID::hdlname, netlist.hdlname (sym));
26952699 transfer_attrs (sym, cell);
26962700
26972701 auto port_names = sym.getPortNames ();
@@ -2906,14 +2910,15 @@ struct PopulateNetlist : public TimingPatternInterpretor, public ast::ASTVisitor
29062910};
29072911
29082912static void build_hierpath2 (NetlistContext &netlist,
2909- std::ostringstream &s, const ast::Scope *scope)
2913+ std::ostringstream &s, const ast::Scope *scope,
2914+ const std::string &sep = " ." )
29102915{
29112916 if (!scope ||
29122917 static_cast <const ast::Scope *>(&netlist.realm ) == scope)
29132918 return ;
29142919
29152920 if (netlist.scopes_remap .count (scope)) {
2916- s << netlist.scopes_remap .at (scope) << " . " ;
2921+ s << netlist.scopes_remap .at (scope) << sep ;
29172922 return ;
29182923 }
29192924
@@ -2925,17 +2930,17 @@ static void build_hierpath2(NetlistContext &netlist,
29252930 symbol = symbol->as <ast::CheckerInstanceBodySymbol>().parentInstance ;
29262931
29272932 if (auto parent = symbol->getParentScope ())
2928- build_hierpath2 (netlist, s, parent);
2933+ build_hierpath2 (netlist, s, parent, sep );
29292934
29302935 if (symbol->kind == ast::SymbolKind::GenerateBlockArray) {
29312936 auto &array = symbol->as <ast::GenerateBlockArraySymbol>();
29322937 s << array.getExternalName ();
29332938 } else if (symbol->kind == ast::SymbolKind::GenerateBlock) {
29342939 auto &block = symbol->as <ast::GenerateBlockSymbol>();
29352940 if (auto index = block.arrayIndex ) {
2936- s << " [" << index->toString (slang::LiteralBase::Decimal, false ) << " ]. " ;
2941+ s << " [" << index->toString (slang::LiteralBase::Decimal, false ) << " ]" << sep ;
29372942 } else {
2938- s << block.getExternalName () << " . " ;
2943+ s << block.getExternalName () << sep ;
29392944 }
29402945 } else if (symbol->kind == ast::SymbolKind::Instance ||
29412946 symbol->kind == ast::SymbolKind::CheckerInstance) {
@@ -2950,13 +2955,13 @@ static void build_hierpath2(NetlistContext &netlist,
29502955 s << " [" << ((int ) inst.arrayPath [i]) + dimensions[i].lower () << " ]" ;
29512956 }
29522957
2953- s << " . " ;
2958+ s << sep ;
29542959 } else if (symbol->kind == ast::SymbolKind::InstanceArray) {
29552960 s << symbol->name ;
29562961 } else if (!symbol->name .empty ()) {
2957- s << symbol->name << " . " ;
2962+ s << symbol->name << sep ;
29582963 } else if (symbol->kind == ast::SymbolKind::StatementBlock) {
2959- s << " $" << (int ) symbol->getIndex () << " . " ;
2964+ s << " $" << (int ) symbol->getIndex () << sep ;
29602965 }
29612966}
29622967
@@ -3041,10 +3046,11 @@ std::string hierpath_relative_to(const ast::Scope *relative_to, const ast::Scope
30413046 return path.str ();
30423047}
30433048
3044- RTLIL::IdString NetlistContext::id (const ast::Symbol &symbol)
3049+ std::string build_hiername (NetlistContext &netlist, const ast::Symbol &symbol,
3050+ const std::string &sep)
30453051{
30463052 std::ostringstream path;
3047- build_hierpath2 (* this , path, symbol.getParentScope ());
3053+ build_hierpath2 (netlist , path, symbol.getParentScope (), sep );
30483054 path << symbol.name ;
30493055
30503056 if (symbol.kind == ast::SymbolKind::Instance ||
@@ -3058,12 +3064,23 @@ RTLIL::IdString NetlistContext::id(const ast::Symbol &symbol)
30583064 }
30593065 }
30603066
3061- return RTLIL::escape_id (path.str ());
3067+ return path.str ();
3068+ }
3069+
3070+ RTLIL::IdString NetlistContext::id (const ast::Symbol &symbol)
3071+ {
3072+ return RTLIL::escape_id (build_hiername (*this , symbol, " ." ));
3073+ }
3074+
3075+ std::string NetlistContext::hdlname (const ast::Symbol &symbol)
3076+ {
3077+ return build_hiername (*this , symbol, " " );
30623078}
30633079
30643080RTLIL::Wire *NetlistContext::add_wire (const ast::ValueSymbol &symbol)
30653081{
30663082 auto w = canvas->addWire (id (symbol), symbol.getType ().getBitstreamWidth ());
3083+ w->set_string_attribute (ID::hdlname, hdlname (symbol));
30673084 wire_cache[&symbol] = w;
30683085 transfer_attrs (symbol, w);
30693086 return w;
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