Simpasm: run autogen with simpasm simplification

Signed-off-by: willieyz <[email protected]>

Author: willieyz

BIBLIOGRAPHY.md

@@ -72,6 +72,9 @@ source code and documentation.
   - Matthias J. Kannwischer
 * URL: https://eprint.iacr.org/2022/1243
 * Referenced from:
+  - [dev/fips202/aarch64/auto.h](dev/fips202/aarch64/auto.h)
+  - [dev/fips202/aarch64/src/keccak_f1600_x1_v84a_asm.S](dev/fips202/aarch64/src/keccak_f1600_x1_v84a_asm.S)
+  - [dev/fips202/aarch64/src/keccak_f1600_x2_v84a_asm.S](dev/fips202/aarch64/src/keccak_f1600_x2_v84a_asm.S)
   - [mldsa/fips202/native/aarch64/auto.h](mldsa/fips202/native/aarch64/auto.h)
   - [mldsa/fips202/native/aarch64/src/keccak_f1600_x1_v84a_asm.S](mldsa/fips202/native/aarch64/src/keccak_f1600_x1_v84a_asm.S)
   - [mldsa/fips202/native/aarch64/src/keccak_f1600_x2_v84a_asm.S](mldsa/fips202/native/aarch64/src/keccak_f1600_x2_v84a_asm.S)
@@ -145,6 +148,27 @@ source code and documentation.
   - Damien Stehlé
 * URL: https://github.com/pq-crystals/dilithium/tree/master/avx2
 * Referenced from:
+  - [dev/x86_64/src/align.h](dev/x86_64/src/align.h)
+  - [dev/x86_64/src/consts.c](dev/x86_64/src/consts.c)
+  - [dev/x86_64/src/consts.h](dev/x86_64/src/consts.h)
+  - [dev/x86_64/src/intt.S](dev/x86_64/src/intt.S)
+  - [dev/x86_64/src/ntt.S](dev/x86_64/src/ntt.S)
+  - [dev/x86_64/src/nttunpack.S](dev/x86_64/src/nttunpack.S)
+  - [dev/x86_64/src/pointwise.S](dev/x86_64/src/pointwise.S)
+  - [dev/x86_64/src/pointwise_acc_l4.S](dev/x86_64/src/pointwise_acc_l4.S)
+  - [dev/x86_64/src/pointwise_acc_l5.S](dev/x86_64/src/pointwise_acc_l5.S)
+  - [dev/x86_64/src/pointwise_acc_l7.S](dev/x86_64/src/pointwise_acc_l7.S)
+  - [dev/x86_64/src/poly_caddq_avx2.c](dev/x86_64/src/poly_caddq_avx2.c)
+  - [dev/x86_64/src/poly_chknorm_avx2.c](dev/x86_64/src/poly_chknorm_avx2.c)
+  - [dev/x86_64/src/poly_decompose_32_avx2.c](dev/x86_64/src/poly_decompose_32_avx2.c)
+  - [dev/x86_64/src/poly_decompose_88_avx2.c](dev/x86_64/src/poly_decompose_88_avx2.c)
+  - [dev/x86_64/src/poly_use_hint_32_avx2.c](dev/x86_64/src/poly_use_hint_32_avx2.c)
+  - [dev/x86_64/src/poly_use_hint_88_avx2.c](dev/x86_64/src/poly_use_hint_88_avx2.c)
+  - [dev/x86_64/src/polyz_unpack_17_avx2.c](dev/x86_64/src/polyz_unpack_17_avx2.c)
+  - [dev/x86_64/src/polyz_unpack_19_avx2.c](dev/x86_64/src/polyz_unpack_19_avx2.c)
+  - [dev/x86_64/src/rej_uniform_avx2.c](dev/x86_64/src/rej_uniform_avx2.c)
+  - [dev/x86_64/src/rej_uniform_eta2_avx2.c](dev/x86_64/src/rej_uniform_eta2_avx2.c)
+  - [dev/x86_64/src/rej_uniform_eta4_avx2.c](dev/x86_64/src/rej_uniform_eta4_avx2.c)
   - [mldsa/native/x86_64/src/align.h](mldsa/native/x86_64/src/align.h)
   - [mldsa/native/x86_64/src/consts.c](mldsa/native/x86_64/src/consts.c)
   - [mldsa/native/x86_64/src/consts.h](mldsa/native/x86_64/src/consts.h)

mldsa/fips202/native/aarch64/auto.h

@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) The mlkem-native project authors
+ * Copyright (c) The mldsa-native project authors
+ * SPDX-License-Identifier: Apache-2.0 OR ISC OR MIT
+ */
+
+/* References
+ * ==========
+ *
+ * - [HYBRID]
+ *   Hybrid scalar/vector implementations of Keccak and SPHINCS+ on AArch64
+ *   Becker, Kannwischer
+ *   https://eprint.iacr.org/2022/1243
+ */
+
+#ifndef MLD_FIPS202_NATIVE_AARCH64_AUTO_H
+#define MLD_FIPS202_NATIVE_AARCH64_AUTO_H
+/* Default FIPS202 assembly profile for AArch64 systems */
+
+/*
+ * Default logic to decide which implementation to use.
+ *
+ */
+
+/*
+ * Keccak-f1600
+ *
+ * - On Arm-based Apple CPUs, we pick a pure Neon implementation.
+ * - Otherwise, unless MLD_SYS_AARCH64_SLOW_BARREL_SHIFTER is set,
+ *   we use lazy-rotation scalar assembly from @[HYBRID].
+ * - Otherwise, if MLD_SYS_AARCH64_SLOW_BARREL_SHIFTER is set, we
+ *   fall back to the standard C implementation.
+ */
+#if defined(__ARM_FEATURE_SHA3) && defined(__APPLE__)
+#include "x1_v84a.h"
+#elif !defined(MLD_SYS_AARCH64_SLOW_BARREL_SHIFTER)
+#include "x1_scalar.h"
+#endif
+
+/*
+ * Keccak-f1600x2/x4
+ *
+ * The optimal implementation is highly CPU-specific; see @[HYBRID].
+ *
+ * For now, if v8.4-A is not implemented, we fall back to Keccak-f1600.
+ * If v8.4-A is implemented and we are on an Apple CPU, we use a plain
+ * Neon-based implementation.
+ * If v8.4-A is implemented and we are not on an Apple CPU, we use a
+ * scalar/Neon/Neon hybrid.
+ * The reason for this distinction is that Apple CPUs appear to implement
+ * the SHA3 instructions on all SIMD units, while Arm CPUs prior to Cortex-X4
+ * don't, and ordinary Neon instructions are still needed.
+ */
+#if defined(__ARM_FEATURE_SHA3)
+/*
+ * For Apple-M cores, we use a plain implementation leveraging SHA3
+ * instructions only.
+ */
+#if defined(__APPLE__)
+#include "x2_v84a.h"
+#else
+#include "x4_v8a_v84a_scalar.h"
+#endif
+
+#else /* __ARM_FEATURE_SHA3 */
+
+#include "x4_v8a_scalar.h"
+
+#endif /* !__ARM_FEATURE_SHA3 */
+
+#endif /* !MLD_FIPS202_NATIVE_AARCH64_AUTO_H */

mldsa/fips202/native/aarch64/src/fips202_native_aarch64.h

@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) The mlkem-native project authors
+ * Copyright (c) The mldsa-native project authors
+ * SPDX-License-Identifier: Apache-2.0 OR ISC OR MIT
+ */
+#ifndef MLD_FIPS202_NATIVE_AARCH64_SRC_FIPS202_NATIVE_AARCH64_H
+#define MLD_FIPS202_NATIVE_AARCH64_SRC_FIPS202_NATIVE_AARCH64_H
+
+#include <stdint.h>
+#include "../../../../cbmc.h"
+#include "../../../../common.h"
+
+
+#define mld_keccakf1600_round_constants \
+  MLD_NAMESPACE(keccakf1600_round_constants)
+extern const uint64_t mld_keccakf1600_round_constants[];
+
+#define mld_keccak_f1600_x1_scalar_asm MLD_NAMESPACE(keccak_f1600_x1_scalar_asm)
+void mld_keccak_f1600_x1_scalar_asm(uint64_t *state, uint64_t const *rc)
+__contract__(
+  requires(memory_no_alias(state, sizeof(uint64_t) * 25 * 1))
+  requires(rc == mld_keccakf1600_round_constants)
+  assigns(memory_slice(state, sizeof(uint64_t) * 25 * 1))
+);
+
+#define mld_keccak_f1600_x1_v84a_asm MLD_NAMESPACE(keccak_f1600_x1_v84a_asm)
+void mld_keccak_f1600_x1_v84a_asm(uint64_t *state, uint64_t const *rc)
+__contract__(
+  requires(memory_no_alias(state, sizeof(uint64_t) * 25 * 1))
+  requires(rc == mld_keccakf1600_round_constants)
+  assigns(memory_slice(state, sizeof(uint64_t) * 25 * 1))
+);
+
+#define mld_keccak_f1600_x2_v84a_asm MLD_NAMESPACE(keccak_f1600_x2_v84a_asm)
+void mld_keccak_f1600_x2_v84a_asm(uint64_t *state, uint64_t const *rc)
+__contract__(
+  requires(memory_no_alias(state, sizeof(uint64_t) * 25 * 2))
+  requires(rc == mld_keccakf1600_round_constants)
+  assigns(memory_slice(state, sizeof(uint64_t) * 25 * 2))
+);
+
+#define mld_keccak_f1600_x4_scalar_v8a_hybrid_asm \
+  MLD_NAMESPACE(keccak_f1600_x4_scalar_v8a_hybrid_asm)
+void mld_keccak_f1600_x4_scalar_v8a_hybrid_asm(uint64_t *state,
+                                               uint64_t const *rc)
+__contract__(
+  requires(memory_no_alias(state, sizeof(uint64_t) * 25 * 4))
+  requires(rc == mld_keccakf1600_round_constants)
+  assigns(memory_slice(state, sizeof(uint64_t) * 25 * 4))
+);
+
+#define mld_keccak_f1600_x4_scalar_v8a_v84a_hybrid_asm \
+  MLD_NAMESPACE(keccak_f1600_x4_scalar_v8a_v84a_hybrid_asm)
+void mld_keccak_f1600_x4_scalar_v8a_v84a_hybrid_asm(uint64_t *state,
+                                                    uint64_t const *rc)
+__contract__(
+  requires(memory_no_alias(state, sizeof(uint64_t) * 25 * 4))
+  requires(rc == mld_keccakf1600_round_constants)
+  assigns(memory_slice(state, sizeof(uint64_t) * 25 * 4))
+);
+
+#endif /* !MLD_FIPS202_NATIVE_AARCH64_SRC_FIPS202_NATIVE_AARCH64_H */