Merge pull request #1046 from pq-code-package/fixes

hanno-becker · web-flow · commit bb9f01345b34 · 2025-05-28T13:19:10.000+01:00
Minor build fixes
diff --git a/BIBLIOGRAPHY.md b/BIBLIOGRAPHY.md
@@ -157,7 +157,7 @@ source code and documentation.
   - Matthias J. Kannwischer
   - Bo-Yin Yang
   - Shang-Yi Yang
-* URL: https://tches.iacr.org/index.php/TCHES/article/view/9295
+* URL: https://eprint.iacr.org/2021/986
 * Referenced from:
   - [dev/aarch64_clean/README.md](dev/aarch64_clean/README.md)
   - [dev/aarch64_clean/src/intt.S](dev/aarch64_clean/src/intt.S)
diff --git a/BIBLIOGRAPHY.yml b/BIBLIOGRAPHY.yml
@@ -102,7 +102,7 @@
 - id: NeonNTT
   name: "Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1"
   year: 2022
-  url: https://tches.iacr.org/index.php/TCHES/article/view/9295
+  url: https://eprint.iacr.org/2021/986
   author:
   - Becker, Hanno
   - Hwang, Vincent
diff --git a/dev/aarch64_clean/README.md b/dev/aarch64_clean/README.md
@@ -13,5 +13,5 @@ target architecture is Cortex-A55, but you can easily re-optimize the code for a
 by SLOTHY, by adjusting the parameters in the [Makefile](../aarch64_opt/src/Makefile).
 
 <!--- bibliography --->
-[^NeonNTT]: Becker, Hwang, Kannwischer, Yang, Yang: Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1, [https://tches.iacr.org/index.php/TCHES/article/view/9295](https://tches.iacr.org/index.php/TCHES/article/view/9295)
+[^NeonNTT]: Becker, Hwang, Kannwischer, Yang, Yang: Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1, [https://eprint.iacr.org/2021/986](https://eprint.iacr.org/2021/986)
 [^SLOTHY_Paper]: Abdulrahman, Becker, Kannwischer, Klein: Fast and Clean: Auditable high-performance assembly via constraint solving, [https://eprint.iacr.org/2022/1303](https://eprint.iacr.org/2022/1303)
diff --git a/dev/aarch64_clean/src/intt.S b/dev/aarch64_clean/src/intt.S
@@ -29,7 +29,7 @@
  * - [NeonNTT]
  *   Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
  *   Becker, Hwang, Kannwischer, Yang, Yang
- *   https://tches.iacr.org/index.php/TCHES/article/view/9295
+ *   https://eprint.iacr.org/2021/986
  *
  * - [SLOTHY_Paper]
  *   Fast and Clean: Auditable high-performance assembly via constraint solving
diff --git a/dev/aarch64_clean/src/ntt.S b/dev/aarch64_clean/src/ntt.S
@@ -29,7 +29,7 @@
  * - [NeonNTT]
  *   Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
  *   Becker, Hwang, Kannwischer, Yang, Yang
- *   https://tches.iacr.org/index.php/TCHES/article/view/9295
+ *   https://eprint.iacr.org/2021/986
  *
  * - [SLOTHY_Paper]
  *   Fast and Clean: Auditable high-performance assembly via constraint solving
diff --git a/dev/aarch64_clean/src/polyvec_basemul_acc_montgomery_cached_asm_k2.S b/dev/aarch64_clean/src/polyvec_basemul_acc_montgomery_cached_asm_k2.S
@@ -9,7 +9,7 @@
  * - [NeonNTT]
  *   Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
  *   Becker, Hwang, Kannwischer, Yang, Yang
- *   https://tches.iacr.org/index.php/TCHES/article/view/9295
+ *   https://eprint.iacr.org/2021/986
  */
 
 /* Re-implementation of asymmetric base multiplication following @[NeonNTT] */
diff --git a/dev/aarch64_clean/src/polyvec_basemul_acc_montgomery_cached_asm_k3.S b/dev/aarch64_clean/src/polyvec_basemul_acc_montgomery_cached_asm_k3.S
@@ -9,7 +9,7 @@
  * - [NeonNTT]
  *   Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
  *   Becker, Hwang, Kannwischer, Yang, Yang
- *   https://tches.iacr.org/index.php/TCHES/article/view/9295
+ *   https://eprint.iacr.org/2021/986
  */
 
 /* Re-implementation of asymmetric base multiplication following @[NeonNTT] */
diff --git a/dev/aarch64_clean/src/polyvec_basemul_acc_montgomery_cached_asm_k4.S b/dev/aarch64_clean/src/polyvec_basemul_acc_montgomery_cached_asm_k4.S
@@ -9,7 +9,7 @@
  * - [NeonNTT]
  *   Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
  *   Becker, Hwang, Kannwischer, Yang, Yang
- *   https://tches.iacr.org/index.php/TCHES/article/view/9295
+ *   https://eprint.iacr.org/2021/986
  */
 
 /* Re-implementation of asymmetric base multiplication following @[NeonNTT] */
diff --git a/dev/aarch64_opt/README.md b/dev/aarch64_opt/README.md
@@ -11,5 +11,5 @@ target architecture is Cortex-A55, but you can easily re-optimize the code for a
 by SLOTHY, by adjusting the parameters in the [Makefile](src/Makefile).
 
 <!--- bibliography --->
-[^NeonNTT]: Becker, Hwang, Kannwischer, Yang, Yang: Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1, [https://tches.iacr.org/index.php/TCHES/article/view/9295](https://tches.iacr.org/index.php/TCHES/article/view/9295)
+[^NeonNTT]: Becker, Hwang, Kannwischer, Yang, Yang: Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1, [https://eprint.iacr.org/2021/986](https://eprint.iacr.org/2021/986)
 [^SLOTHY_Paper]: Abdulrahman, Becker, Kannwischer, Klein: Fast and Clean: Auditable high-performance assembly via constraint solving, [https://eprint.iacr.org/2022/1303](https://eprint.iacr.org/2022/1303)
diff --git a/dev/aarch64_opt/src/intt.S b/dev/aarch64_opt/src/intt.S
@@ -29,7 +29,7 @@
  * - [NeonNTT]
  *   Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
  *   Becker, Hwang, Kannwischer, Yang, Yang
- *   https://tches.iacr.org/index.php/TCHES/article/view/9295
+ *   https://eprint.iacr.org/2021/986
  *
  * - [SLOTHY_Paper]
  *   Fast and Clean: Auditable high-performance assembly via constraint solving
diff --git a/dev/aarch64_opt/src/ntt.S b/dev/aarch64_opt/src/ntt.S
@@ -29,7 +29,7 @@
  * - [NeonNTT]
  *   Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
  *   Becker, Hwang, Kannwischer, Yang, Yang
- *   https://tches.iacr.org/index.php/TCHES/article/view/9295
+ *   https://eprint.iacr.org/2021/986
  *
  * - [SLOTHY_Paper]
  *   Fast and Clean: Auditable high-performance assembly via constraint solving
diff --git a/dev/aarch64_opt/src/polyvec_basemul_acc_montgomery_cached_asm_k2.S b/dev/aarch64_opt/src/polyvec_basemul_acc_montgomery_cached_asm_k2.S
@@ -9,7 +9,7 @@
  * - [NeonNTT]
  *   Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
  *   Becker, Hwang, Kannwischer, Yang, Yang
- *   https://tches.iacr.org/index.php/TCHES/article/view/9295
+ *   https://eprint.iacr.org/2021/986
  */
 
 /* Re-implementation of asymmetric base multiplication following @[NeonNTT] */
diff --git a/dev/aarch64_opt/src/polyvec_basemul_acc_montgomery_cached_asm_k3.S b/dev/aarch64_opt/src/polyvec_basemul_acc_montgomery_cached_asm_k3.S
@@ -9,7 +9,7 @@
  * - [NeonNTT]
  *   Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
  *   Becker, Hwang, Kannwischer, Yang, Yang
- *   https://tches.iacr.org/index.php/TCHES/article/view/9295
+ *   https://eprint.iacr.org/2021/986
  */
 
 /* Re-implementation of asymmetric base multiplication following @[NeonNTT] */
diff --git a/dev/aarch64_opt/src/polyvec_basemul_acc_montgomery_cached_asm_k4.S b/dev/aarch64_opt/src/polyvec_basemul_acc_montgomery_cached_asm_k4.S
@@ -9,7 +9,7 @@
  * - [NeonNTT]
  *   Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
  *   Becker, Hwang, Kannwischer, Yang, Yang
- *   https://tches.iacr.org/index.php/TCHES/article/view/9295
+ *   https://eprint.iacr.org/2021/986
  */
 
 /* Re-implementation of asymmetric base multiplication following @[NeonNTT] */
diff --git a/examples/monolithic_build_multilevel_native/Makefile b/examples/monolithic_build_multilevel_native/Makefile
@@ -52,36 +52,34 @@ BIN=test_binary
 
 # Automatically detect system architecture and set preprocessor etc accordingly
 HOST_PLATFORM := $(shell uname -s)-$(shell uname -m)
+
 # linux x86_64
 ifeq ($(HOST_PLATFORM),Linux-x86_64)
 	CFLAGS += -z noexecstack
 endif
 
-ifeq ($(HOST_PLATFORM),Linux-x86_64)
+# Native compilation
 ifeq ($(CROSS_PREFIX),)
+ifeq ($(HOST_PLATFORM),Linux-x86_64)
 	CFLAGS += -mavx2 -mbmi2 -mpopcnt -maes
 	CFLAGS += -DMLK_FORCE_X86_64
-else ifneq ($(findstring aarch64_be, $(CROSS_PREFIX)),)
-	CFLAGS += -DMLK_FORCE_AARCH64_EB
-else ifneq ($(findstring aarch64, $(CROSS_PREFIX)),)
-	CFLAGS += -DMLK_FORCE_AARCH64
-else
-
-endif
-
-# linux aarch64
 else ifeq ($(HOST_PLATFORM),Linux-aarch64)
-ifeq ($(CROSS_PREFIX),)
 	CFLAGS += -DMLK_FORCE_AARCH64
+else ifeq ($(HOST_PLATFORM),Darwin-arm64)
+	CFLAGS += -DMLK_FORCE_AARCH64
+endif
+# Cross compilation
 else ifneq ($(findstring x86_64, $(CROSS_PREFIX)),)
 	CFLAGS += -mavx2 -mbmi2 -mpopcnt -maes
 	CFLAGS += -DMLK_FORCE_X86_64
-else
-endif
-
-# darwin aarch64
-else ifeq ($(HOST_PLATFORM),Darwin-arm64)
+else ifneq ($(findstring aarch64_be, $(CROSS_PREFIX)),)
+	CFLAGS += -DMLK_FORCE_AARCH64_EB
+else ifneq ($(findstring aarch64, $(CROSS_PREFIX)),)
 	CFLAGS += -DMLK_FORCE_AARCH64
+else ifneq ($(findstring riscv64, $(CROSS_PREFIX)),)
+	CFLAGS += -DMLK_FORCE_RISCV64
+else ifneq ($(findstring powerpc64le, $(CROSS_PREFIX)),)
+	CFLAGS += -DMLK_FORCE_PPC64LE
 endif
 
 CFLAGS := \
diff --git a/examples/multilevel_build_native/Makefile b/examples/multilevel_build_native/Makefile
@@ -14,36 +14,34 @@ endif
 
 # Automatically detect system architecture and set preprocessor etc accordingly
 HOST_PLATFORM := $(shell uname -s)-$(shell uname -m)
+
 # linux x86_64
 ifeq ($(HOST_PLATFORM),Linux-x86_64)
 	CFLAGS += -z noexecstack
 endif
 
-ifeq ($(HOST_PLATFORM),Linux-x86_64)
+# Native compilation
 ifeq ($(CROSS_PREFIX),)
+ifeq ($(HOST_PLATFORM),Linux-x86_64)
 	CFLAGS += -mavx2 -mbmi2 -mpopcnt -maes
 	CFLAGS += -DMLK_FORCE_X86_64
-else ifneq ($(findstring aarch64_be, $(CROSS_PREFIX)),)
-	CFLAGS += -DMLK_FORCE_AARCH64_EB
-else ifneq ($(findstring aarch64, $(CROSS_PREFIX)),)
-	CFLAGS += -DMLK_FORCE_AARCH64
-else
-
-endif
-
-# linux aarch64
 else ifeq ($(HOST_PLATFORM),Linux-aarch64)
-ifeq ($(CROSS_PREFIX),)
 	CFLAGS += -DMLK_FORCE_AARCH64
+else ifeq ($(HOST_PLATFORM),Darwin-arm64)
+	CFLAGS += -DMLK_FORCE_AARCH64
+endif
+# Cross compilation
 else ifneq ($(findstring x86_64, $(CROSS_PREFIX)),)
 	CFLAGS += -mavx2 -mbmi2 -mpopcnt -maes
 	CFLAGS += -DMLK_FORCE_X86_64
-else
-endif
-
-# darwin aarch64
-else ifeq ($(HOST_PLATFORM),Darwin-arm64)
+else ifneq ($(findstring aarch64_be, $(CROSS_PREFIX)),)
+	CFLAGS += -DMLK_FORCE_AARCH64_EB
+else ifneq ($(findstring aarch64, $(CROSS_PREFIX)),)
 	CFLAGS += -DMLK_FORCE_AARCH64
+else ifneq ($(findstring riscv64, $(CROSS_PREFIX)),)
+	CFLAGS += -DMLK_FORCE_RISCV64
+else ifneq ($(findstring powerpc64le, $(CROSS_PREFIX)),)
+	CFLAGS += -DMLK_FORCE_PPC64LE
 endif
 
 CFLAGS := \
diff --git a/mlkem/native/aarch64/README.md b/mlkem/native/aarch64/README.md
@@ -12,5 +12,5 @@ and most preprocessor directives by [`scripts/simpasm`](../../../scripts/simpasm
 If you want to understand how the assembly works, and/or make changes to it, consult [dev/](../../../dev).
 
 <!--- bibliography --->
-[^NeonNTT]: Becker, Hwang, Kannwischer, Yang, Yang: Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1, [https://tches.iacr.org/index.php/TCHES/article/view/9295](https://tches.iacr.org/index.php/TCHES/article/view/9295)
+[^NeonNTT]: Becker, Hwang, Kannwischer, Yang, Yang: Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1, [https://eprint.iacr.org/2021/986](https://eprint.iacr.org/2021/986)
 [^SLOTHY_Paper]: Abdulrahman, Becker, Kannwischer, Klein: Fast and Clean: Auditable high-performance assembly via constraint solving, [https://eprint.iacr.org/2022/1303](https://eprint.iacr.org/2022/1303)
diff --git a/mlkem/native/aarch64/src/intt.S b/mlkem/native/aarch64/src/intt.S
@@ -29,7 +29,7 @@
  * - [NeonNTT]
  *   Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
  *   Becker, Hwang, Kannwischer, Yang, Yang
- *   https://tches.iacr.org/index.php/TCHES/article/view/9295
+ *   https://eprint.iacr.org/2021/986
  *
  * - [SLOTHY_Paper]
  *   Fast and Clean: Auditable high-performance assembly via constraint solving
diff --git a/mlkem/native/aarch64/src/ntt.S b/mlkem/native/aarch64/src/ntt.S
@@ -29,7 +29,7 @@
  * - [NeonNTT]
  *   Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
  *   Becker, Hwang, Kannwischer, Yang, Yang
- *   https://tches.iacr.org/index.php/TCHES/article/view/9295
+ *   https://eprint.iacr.org/2021/986
  *
  * - [SLOTHY_Paper]
  *   Fast and Clean: Auditable high-performance assembly via constraint solving
diff --git a/mlkem/native/aarch64/src/polyvec_basemul_acc_montgomery_cached_asm_k2.S b/mlkem/native/aarch64/src/polyvec_basemul_acc_montgomery_cached_asm_k2.S
@@ -9,7 +9,7 @@
  * - [NeonNTT]
  *   Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
  *   Becker, Hwang, Kannwischer, Yang, Yang
- *   https://tches.iacr.org/index.php/TCHES/article/view/9295
+ *   https://eprint.iacr.org/2021/986
  */
 
 /* Re-implementation of asymmetric base multiplication following @[NeonNTT] */
diff --git a/mlkem/native/aarch64/src/polyvec_basemul_acc_montgomery_cached_asm_k3.S b/mlkem/native/aarch64/src/polyvec_basemul_acc_montgomery_cached_asm_k3.S
@@ -9,7 +9,7 @@
  * - [NeonNTT]
  *   Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
  *   Becker, Hwang, Kannwischer, Yang, Yang
- *   https://tches.iacr.org/index.php/TCHES/article/view/9295
+ *   https://eprint.iacr.org/2021/986
  */
 
 /* Re-implementation of asymmetric base multiplication following @[NeonNTT] */
diff --git a/mlkem/native/aarch64/src/polyvec_basemul_acc_montgomery_cached_asm_k4.S b/mlkem/native/aarch64/src/polyvec_basemul_acc_montgomery_cached_asm_k4.S
@@ -9,7 +9,7 @@
  * - [NeonNTT]
  *   Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
  *   Becker, Hwang, Kannwischer, Yang, Yang
- *   https://tches.iacr.org/index.php/TCHES/article/view/9295
+ *   https://eprint.iacr.org/2021/986
  */
 
 /* Re-implementation of asymmetric base multiplication following @[NeonNTT] */
diff --git a/mlkem/poly.c b/mlkem/poly.c
@@ -9,7 +9,7 @@
  * - [NeonNTT]
  *   Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
  *   Becker, Hwang, Kannwischer, Yang, Yang
- *   https://tches.iacr.org/index.php/TCHES/article/view/9295
+ *   https://eprint.iacr.org/2021/986
  *
  * - [REF]
  *   CRYSTALS-Kyber C reference implementation
diff --git a/mlkem/poly_k.c b/mlkem/poly_k.c
@@ -14,7 +14,7 @@
  * - [NeonNTT]
  *   Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
  *   Becker, Hwang, Kannwischer, Yang, Yang
- *   https://tches.iacr.org/index.php/TCHES/article/view/9295
+ *   https://eprint.iacr.org/2021/986
  *
  * - [REF]
  *   CRYSTALS-Kyber C reference implementation
diff --git a/proofs/hol_light/arm/mlkem/mlkem_intt.S b/proofs/hol_light/arm/mlkem/mlkem_intt.S
@@ -29,7 +29,7 @@
  * - [NeonNTT]
  *   Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
  *   Becker, Hwang, Kannwischer, Yang, Yang
- *   https://tches.iacr.org/index.php/TCHES/article/view/9295
+ *   https://eprint.iacr.org/2021/986
  *
  * - [SLOTHY_Paper]
  *   Fast and Clean: Auditable high-performance assembly via constraint solving
diff --git a/proofs/hol_light/arm/mlkem/mlkem_ntt.S b/proofs/hol_light/arm/mlkem/mlkem_ntt.S
@@ -29,7 +29,7 @@
  * - [NeonNTT]
  *   Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
  *   Becker, Hwang, Kannwischer, Yang, Yang
- *   https://tches.iacr.org/index.php/TCHES/article/view/9295
+ *   https://eprint.iacr.org/2021/986
  *
  * - [SLOTHY_Paper]
  *   Fast and Clean: Auditable high-performance assembly via constraint solving
diff --git a/proofs/hol_light/arm/mlkem/mlkem_poly_basemul_acc_montgomery_cached_k2.S b/proofs/hol_light/arm/mlkem/mlkem_poly_basemul_acc_montgomery_cached_k2.S
@@ -9,7 +9,7 @@
  * - [NeonNTT]
  *   Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
  *   Becker, Hwang, Kannwischer, Yang, Yang
- *   https://tches.iacr.org/index.php/TCHES/article/view/9295
+ *   https://eprint.iacr.org/2021/986
  */
 
 /* Re-implementation of asymmetric base multiplication following @[NeonNTT] */
diff --git a/proofs/hol_light/arm/mlkem/mlkem_poly_basemul_acc_montgomery_cached_k3.S b/proofs/hol_light/arm/mlkem/mlkem_poly_basemul_acc_montgomery_cached_k3.S
@@ -9,7 +9,7 @@
  * - [NeonNTT]
  *   Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
  *   Becker, Hwang, Kannwischer, Yang, Yang
- *   https://tches.iacr.org/index.php/TCHES/article/view/9295
+ *   https://eprint.iacr.org/2021/986
  */
 
 /* Re-implementation of asymmetric base multiplication following @[NeonNTT] */
diff --git a/proofs/hol_light/arm/mlkem/mlkem_poly_basemul_acc_montgomery_cached_k4.S b/proofs/hol_light/arm/mlkem/mlkem_poly_basemul_acc_montgomery_cached_k4.S
@@ -9,7 +9,7 @@
  * - [NeonNTT]
  *   Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1
  *   Becker, Hwang, Kannwischer, Yang, Yang
- *   https://tches.iacr.org/index.php/TCHES/article/view/9295
+ *   https://eprint.iacr.org/2021/986
  */
 
 /* Re-implementation of asymmetric base multiplication following @[NeonNTT] */
diff --git a/test/acvp_client.py b/test/acvp_client.py
@@ -15,7 +15,7 @@
 
 # Check if we need to use a wrapper for execution (e.g. QEMU)
 exec_prefix = os.environ.get("EXEC_WRAPPER", "")
-exec_prefix = [exec_prefix] if exec_prefix != "" else []
+exec_prefix = exec_prefix.split(" ") if exec_prefix != "" else []
 
 acvp_dir = "test/acvp_data"
 acvp_keygen_jsons = [
diff --git a/test/mk/auto.mk b/test/mk/auto.mk
@@ -1,36 +1,27 @@
 # SPDX-License-Identifier: Apache-2.0 OR ISC OR MIT
 #
 # Automatically detect system architecture and set preprocessor etc accordingly
-ifeq ($(HOST_PLATFORM),Linux-x86_64)
+
+# Native compilation
 ifeq ($(CROSS_PREFIX),)
+ifeq ($(HOST_PLATFORM),Linux-x86_64)
 	CFLAGS += -mavx2 -mbmi2 -mpopcnt -maes
 	CFLAGS += -DMLK_FORCE_X86_64
-else ifneq ($(findstring aarch64_be, $(CROSS_PREFIX)),)
-	CFLAGS += -DMLK_FORCE_AARCH64_EB
-else ifneq ($(findstring aarch64, $(CROSS_PREFIX)),)
-	CFLAGS += -DMLK_FORCE_AARCH64
-else
-
-endif
-
-# linux aarch64
 else ifeq ($(HOST_PLATFORM),Linux-aarch64)
-ifeq ($(CROSS_PREFIX),)
 	CFLAGS += -DMLK_FORCE_AARCH64
-else ifneq ($(findstring x86_64, $(CROSS_PREFIX)),)
-	CFLAGS += -mavx2 -mbmi2 -mpopcnt -maes
-	CFLAGS += -DMLK_FORCE_X86_64
-else
-endif
-
-# darwin aarch64
 else ifeq ($(HOST_PLATFORM),Darwin-arm64)
-ifeq ($(CROSS_PREFIX),)
 	CFLAGS += -DMLK_FORCE_AARCH64
+endif
+# Cross compilation
 else ifneq ($(findstring x86_64, $(CROSS_PREFIX)),)
+	CFLAGS += -mavx2 -mbmi2 -mpopcnt -maes
 	CFLAGS += -DMLK_FORCE_X86_64
+else ifneq ($(findstring aarch64_be, $(CROSS_PREFIX)),)
+	CFLAGS += -DMLK_FORCE_AARCH64_EB
 else ifneq ($(findstring aarch64, $(CROSS_PREFIX)),)
 	CFLAGS += -DMLK_FORCE_AARCH64
-else
-endif
+else ifneq ($(findstring riscv64, $(CROSS_PREFIX)),)
+	CFLAGS += -DMLK_FORCE_RISCV64
+else ifneq ($(findstring powerpc64le, $(CROSS_PREFIX)),)
+	CFLAGS += -DMLK_FORCE_PPC64LE
 endif

Original file line number	Diff line number	Diff line change
`@@ -29,7 +29,7 @@`
`29`	`29`	`* - [NeonNTT]`
`30`	`30`	`* Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1`
`31`	`31`	`* Becker, Hwang, Kannwischer, Yang, Yang`
`32`		`- * https://tches.iacr.org/index.php/TCHES/article/view/9295`
	`32`	`+ * https://eprint.iacr.org/2021/986`
`33`	`33`	`*`
`34`	`34`	`* - [SLOTHY_Paper]`
`35`	`35`	`* Fast and Clean: Auditable high-performance assembly via constraint solving`