@@ -240,7 +240,7 @@ static int xe_add_combinations(struct driver *drv)
240240 & metadata_4_tiled , render_not_linear );
241241 drv_add_combinations (drv , scanout_render_formats ,
242242 ARRAY_SIZE (scanout_render_formats ), & metadata_4_tiled ,
243- render_not_linear );
243+ scanout_and_render_not_linear );
244244 drv_add_combinations (drv , source_formats , ARRAY_SIZE (source_formats ), & metadata_4_tiled ,
245245 texture_flags | BO_USE_NON_GPU_HW );
246246
@@ -268,7 +268,7 @@ static int xe_add_combinations(struct driver *drv)
268268 */
269269 drv_add_combinations (drv , scanout_render_formats ,
270270 ARRAY_SIZE (scanout_render_formats ), & metadata_y_tiled ,
271- render_not_linear );
271+ scanout_and_render_not_linear );
272272 drv_add_combinations (drv , source_formats , ARRAY_SIZE (source_formats ), & metadata_y_tiled ,
273273 texture_flags | BO_USE_NON_GPU_HW );
274274
@@ -347,7 +347,11 @@ static void xe_clflush(void *start, size_t size)
347347
348348 __builtin_ia32_mfence ();
349349 while (p < end ) {
350- __builtin_ia32_clflush (p );
350+ #if defined(__CLFLUSHOPT__ )
351+ __builtin_ia32_clflushopt (p );
352+ #else
353+ __builtin_ia32_clflush (p );
354+ #endif
351355 p = (void * )((uintptr_t )p + XE_CACHELINE_SIZE );
352356 }
353357}
@@ -653,7 +657,6 @@ static int xe_bo_create_from_metadata(struct bo *bo)
653657 int ret ;
654658 size_t plane ;
655659 uint32_t gem_handle ;
656- uint32_t vm ;
657660
658661 /* From xe_drm.h: If a VM is specified, this BO must:
659662 * 1. Only ever be bound to that VM.
@@ -662,17 +665,21 @@ static int xe_bo_create_from_metadata(struct bo *bo)
662665 * Should all buffers be defined as external? See here:
663666 * https://gitlab.freedesktop.org/mesa/mesa/-/blob/main/src/intel/vulkan/xe/anv_kmd_backend.c?ref_type=heads#L60
664667 */
665- vm = 0 ;
666668
667669 struct drm_xe_gem_create gem_create = {
668- .vm_id = vm ,
670+ .vm_id = 0 ,
669671 .size = ALIGN (bo -> meta .total_size , PAGE_SIZE ),
670- .flags = DRM_XE_GEM_CREATE_FLAG_SCANOUT ,
672+ .flags = 0 ,
671673 };
672674
673675 /* FIXME: let's assume iGPU with SYSMEM is only supported */
674676 gem_create .placement |= BITFIELD_BIT (DRM_XE_MEM_REGION_CLASS_SYSMEM );
675- gem_create .cpu_caching = DRM_XE_GEM_CPU_CACHING_WC ;
677+ if (bo -> meta .use_flags & BO_USE_SCANOUT ) {
678+ gem_create .flags |= DRM_XE_GEM_CREATE_FLAG_SCANOUT ;
679+ gem_create .cpu_caching = DRM_XE_GEM_CPU_CACHING_WC ;
680+ } else {
681+ gem_create .cpu_caching = DRM_XE_GEM_CPU_CACHING_WB ;
682+ }
676683
677684 ret = drmIoctl (bo -> drv -> fd , DRM_IOCTL_XE_GEM_CREATE , & gem_create );
678685 if (ret ) {
@@ -749,7 +756,8 @@ static int xe_bo_invalidate(struct bo *bo, struct mapping *mapping)
749756static int xe_bo_flush (struct bo * bo , struct mapping * mapping )
750757{
751758 struct xe_device * xe = bo -> drv -> priv ;
752- if (bo -> meta .tiling == XE_TILING_NONE )
759+ if ((bo -> meta .tiling == XE_TILING_NONE )
760+ && (bo -> meta .use_flags & BO_USE_SW_WRITE_OFTEN ))
753761 xe_clflush (mapping -> vma -> addr , mapping -> vma -> length );
754762
755763 return 0 ;
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