sync: Parameterize reset value (#122)

Author: zarubaf

CHANGELOG.md

@@ -11,6 +11,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/spec/v2.0.0.
 - `isochronous_4phase_handshake`: Isochronous clock domain crossing cutting all paths using a 4-phase handshake.
 - Changed `isochronous_spill_register_tb` to `isochronous_crossing_tb` also covering the `isochronous_4phase_handshake`
   module.
+- Make reset value of `sync` module parameterizable.
 
 ## 1.22.1 - 2021-06-14
 ### Fixed

src/sync.sv

@@ -11,7 +11,8 @@
 // Antonio Pullini <[email protected]>
 
 module sync #(
-    parameter int unsigned STAGES = 2
+    parameter int unsigned STAGES = 2,
+    parameter bit ResetValue = 1'b0
 ) (
     input  logic clk_i,
     input  logic rst_ni,
@@ -23,7 +24,7 @@ module sync #(
 
     always_ff @(posedge clk_i, negedge rst_ni) begin
         if (!rst_ni) begin
-            reg_q <= 'h0;
+            reg_q <= {STAGES{ResetValue}};
         end else begin
             reg_q <= {reg_q[STAGES-2:0], serial_i};
         end