Makefile: enable CVE2 tracing with Verilator #268
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| # Copyright (c) 2025 ETH Zurich and University of Bologna. | |
| # Licensed under the Apache License, Version 2.0, see LICENSE for details. | |
| # SPDX-License-Identifier: Apache-2.0 | |
| # Author: Philippe Sauter <[email protected]> | |
| name: Short Flow | |
| on: | |
| push: | |
| branches: | |
| - '**' | |
| jobs: | |
| simulation: | |
| runs-on: ubuntu-latest | |
| timeout-minutes: 30 | |
| steps: | |
| - name: Checkout repository (with submodules) | |
| uses: actions/checkout@v4 | |
| with: | |
| submodules: true | |
| - name: Free disk space | |
| uses: ./.github/actions/free-space | |
| - name: Run simulation commands in OSEDA | |
| uses: ./.github/actions/oseda-cmd | |
| with: | |
| cmd: "make sw && make verilator" | |
| - name: Upload built software | |
| uses: actions/upload-artifact@v4 | |
| with: | |
| name: croc-sw | |
| path: sw/bin | |
| continue-on-error: true | |
| - name: Upload simulation output | |
| uses: actions/upload-artifact@v4 | |
| with: | |
| name: simulation-output | |
| path: | | |
| verilator/croc.fst | |
| verilator/croc.log | |
| continue-on-error: true | |
| - name: Check simulation output | |
| shell: bash | |
| run: ./.github/scripts/check_sim.sh ./verilator/croc.log | |
| synthesis: | |
| runs-on: ubuntu-latest | |
| timeout-minutes: 30 | |
| steps: | |
| - name: Checkout repository (with submodules) | |
| uses: actions/checkout@v4 | |
| with: | |
| submodules: true | |
| - name: Free disk space | |
| uses: ./.github/actions/free-space | |
| - name: Setup OSEDA container | |
| uses: ./.github/actions/oseda-cmd | |
| with: | |
| cmd: "make yosys && tail -n 40 yosys/reports/*area.rpt" | |
| - name: Upload synthesis outputs | |
| uses: actions/upload-artifact@v4 | |
| with: | |
| name: croc-synth-reports | |
| path: | | |
| yosys/reports | |
| yosys/out | |
| continue-on-error: true | |