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ci: add manual workflow dispatch for artistic Short Flow #253: Commit b8e3202 pushed by phsauter
7m 41s main
main
7m 41s
ci: add manual workflow dispatch for artistic Full Flow #158: Pull request #101 opened by phsauter
1h 3m 27s phsauter/artistic-ci
phsauter/artistic-ci
1h 3m 27s
ci: add manual workflow dispatch for artistic Short Flow #252: Commit 7b2eea9 pushed by phsauter
7m 14s phsauter/artistic-ci
phsauter/artistic-ci
7m 14s
Full Flow Full Flow #157: Manually run by thommythomaso
59m 41s tbenz/artistic_v2
tbenz/artistic_v2
59m 41s
On dispatch Short Flow #251: Commit e399ad1 pushed by thommythomaso
1m 2s tbenz/artistic_v2
tbenz/artistic_v2
1m 2s
Full Flow Full Flow #156: Manually run by thommythomaso
2m 50s tbenz/artistic_v2
tbenz/artistic_v2
2m 50s
Add outline gen Short Flow #250: Commit e65dac1 pushed by thommythomaso
3m 32s tbenz/artistic_v2
tbenz/artistic_v2
3m 32s
Replace timer unit with RISC-V CLINT Full Flow #155: Pull request #91 synchronize by ezelioli
55m 26s ez/clint
ez/clint
55m 26s
sw: remove unused interrupts files Short Flow #249: Commit 44ad11f pushed by ezelioli
8m 6s ez/clint
ez/clint
8m 6s
Improve timing constraints Full Flow #154: Pull request #100 opened by phsauter
59m 23s phsauter/constraints
phsauter/constraints
59m 23s
WIP: improve timing constraints Short Flow #248: Commit fcf0a14 pushed by phsauter
7m 58s phsauter/constraints
phsauter/constraints
7m 58s
hw: add power wires to chip ports Short Flow #247: Commit 31cb3ec pushed by phsauter
8m 34s phsauter/constraints
phsauter/constraints
8m 34s
Replace timer unit with RISC-V CLINT Full Flow #153: Pull request #91 synchronize by ezelioli
55m 58s ez/clint
ez/clint
55m 58s
sw: remove unused interrupts files Short Flow #246: Commit 038087a pushed by ezelioli
7m 23s ez/clint
ez/clint
7m 23s
Replace timer unit with RISC-V CLINT Full Flow #152: Pull request #91 synchronize by ezelioli
53m 41s ez/clint
ez/clint
53m 41s
sw: make software test configurable Short Flow #245: Commit 2a5c110 pushed by ezelioli
7m 38s ez/clint
ez/clint
7m 38s
ArtistIC Render ArtistIC Render #27: completed by phsauter
5m 1s
5m 1s
ArtistIC Render ArtistIC Render #26: completed by phsauter
1m 40s
1m 40s
ArtistIC Render ArtistIC Render #25: completed by phsauter
1m 27s
1m 27s
ci: adjust artistic to new floorplan Short Flow #244: Commit 4eea8d6 pushed by phsauter
8m 21s main
main
8m 21s
ci: adjust artistic to new floorplan Full Flow #151: Commit 4eea8d6 pushed by phsauter
1h 2m 17s main
main
1h 2m 17s
rtl: simplify configuration in croc_pkg Full Flow #150: Commit 0dfc200 pushed by phsauter
1h 3m 38s main
main
1h 3m 38s
rtl: simplify configuration in croc_pkg Short Flow #243: Commit 0dfc200 pushed by phsauter
9m 32s main
main
9m 32s
vsim: add Siemens software program to header Full Flow #149: Commit 6aeed6d pushed by phsauter
56m 34s main
main
56m 34s
vsim: add Siemens software program to header Short Flow #242: Commit 6aeed6d pushed by phsauter
7m 49s main
main
7m 49s
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