tools: update to version 2025.12

Author: phsauter

README.md

@@ -10,10 +10,6 @@ Croc was successfully taped out in Nov 2024. The chip is called [MLEM](http://as
 MLEM was designed and prepared for tapeout by ETHZ students as a bachelor project. The exact code and scripts used for the tapeout can be seen in the frozen [mlem-tapeout](https://github.com/pulp-platform/croc/tree/mlem-tapeout) branch.
 
 
-**IMPORTANT: Update to 1.1 recommended.**  
-Release 1.1 and newer includes a fix for the SRAMs where the `A_DLY` pin was tied low instead of high. The pin controls internal timings and the old version may create violations for some SRAMs.  
-
-
 ## Architecture
 
 ![Croc block diagram](doc/croc_arch.svg)
@@ -33,11 +29,14 @@ The main SoC configurations are in `rtl/croc_pkg.sv`:
 
 | Parameter           | Default          | Function                                              |
 |---------------------|------------------|-------------------------------------------------------|
-| `HartId`            | `0`              | Core's Hart ID                                        |
 | `PulpJtagIdCode`    | `32'hED9_C0C50`  | Debug module ID code                                  |
-| `NumExternalIrqs`   | `4`              | Number of external interrupts into Croc domain        |
-| `BankNumWords`      | `512`            | Number of 32bit words in a memory bank                |
+| `SramBankNumWords`  | `512`            | Number of 32bit words in a memory bank                |
 | `NumSramBanks`      | `2`              | Number of memory banks                                |
+| `BootAddr`          | `32'h1000_0000`  | Default boot address set in 'soc_ctrl' register       |
+| `croc_addr_map`     | see 'Memory Map' | Routing rules used for the main crossbar              |
+| `periph_addr_map`   | see 'Memory Map' | Routing rules used for the peripheral demuliplexer    |
+
+Further configurations can be made in `rtl/core_wrap.sv` (core specifics) and `rtl/croc_soc.sv` (connectivity between domains and to/from outside).
 
 The SRAMs are instantiated via a technology wrapper called `tc_sram_impl` (tc: tech_cells), the technology-independent implementation is in `rtl/tech_cells_generic/tc_sram_impl.sv`. A number of SRAM configurations are implemented using IHP130 SRAM memories in `ihp13/tc_sram_impl.sv`. If an unimplemented SRAM configuration is instantiated it will result in a `tc_sram_blackbox` module which can then be easily identified from the synthesis results.
 
@@ -94,7 +93,7 @@ Cell/Module placement                      |  Routing
 
 ## Requirements
 We are using the excellent docker container maintained by Harald Pretl. If you get stuck with installing the tools, we urge you to check the [Tool Repository](https://github.com/iic-jku/IIC-OSIC-TOOLS).  
-The current supported version is 2025.03, no other version is officially supported.
+The current supported version is 2025.12, no other version is officially supported.
 
 ### ETHZ systems
 ETHZ Design Center maintains an internal version of the IHP PDK, with integrations into all tools we have access to. For this reason if you work on the ETH systems it is recommended to use the `icdesign` tool (cockpit) instead of the liked Github repo.  
@@ -114,7 +113,7 @@ source ethz.env
 Additionally you may prefer to just enter a shell in the pre-installed osic-tools container using:
 ```sh
 oseda bash
-# older version eg: oseda -2025.03 bash
+# specific version eg: oseda -2025.12 bash
 ```
 
 ### Other systems

docker-compose.yml

@@ -7,7 +7,7 @@
 
 services:
   pulp-docker:
-    image: hpretl/iic-osic-tools:2025.07.pre1
+    image: hpretl/iic-osic-tools:2025.12
     environment:
       - UID=${UID}
       - GID=${GID}

ethz.env

@@ -7,9 +7,9 @@
 # - Philippe Sauter <[email protected]>
 
 # used in Makefiles
-export BENDER="oseda -2025.07 bender"
-export OPENROAD="oseda -2025.07 openroad"
-export KLAYOUT="oseda -2025.07 klayout"
-export YOSYS="oseda -2025.07 yosys"
-export PYTHON3="oseda -2025.07 python3"
-export VERILATOR="oseda -2025.07 verilator"
+export BENDER="oseda -2025.12 bender"
+export OPENROAD="oseda -2025.12 openroad"
+export KLAYOUT="oseda -2025.12 klayout"
+export YOSYS="oseda -2025.12 yosys"
+export PYTHON3="oseda -2025.12 python3"
+export VERILATOR="oseda -2025.12 verilator"

openroad/scripts/chip.tcl

@@ -185,12 +185,7 @@ utl::report "Clock Tree Synthesis"
 set_wire_rc -clock -layer Metal4
 clock_tree_synthesis -buf_list $ctsBuf -root_buf $ctsBufRoot \
                      -sink_clustering_enable \
-                     -obstruction_aware \
-                     -balance_levels
-
-# Repair wire length between clock pad and clock-tree root
-utl::report "Repair clock nets"
-repair_clock_nets
+                     -repair_clock_nets
 
 # legalize cts cells
 utl::report "Detailed placement"
@@ -236,7 +231,7 @@ utl::report "###################################################################
 # eventually needs M4/M5 it may struggle with finding space
 # to place vias down to M2/M3 -> reserve some space on M2/M3
 # Reduce TM1 to avoid too much routing there (bigger tracks -> bad for routing)
-set_global_routing_layer_adjustment Metal2-Metal3 0.30
+set_global_routing_layer_adjustment Metal2-Metal3 0.20
 set_global_routing_layer_adjustment TopMetal1 0.20
 set_routing_layers -signal Metal2-TopMetal1 -clock Metal2-TopMetal1
 
@@ -295,8 +290,6 @@ repair_antennas -ratio_margin 30 -iterations 5
 utl::report "Detailed route"
 set_thread_count 8
 detailed_route -output_drc ${report_dir}/${log_id_str}_${proj_name}_route_drc.rpt \
-               -bottom_routing_layer Metal2 \
-               -top_routing_layer TopMetal1 \
                -droute_end_iter 30 \
                -drc_report_iter_step 5 \
                -save_guide_updates \

start_linux.sh

@@ -6,10 +6,15 @@
 # Authors:
 # - Philippe Sauter <[email protected]>
 
+RUNDIR=${XDG_RUNTIME_DIR:-/tmp/runtime-$(id -u)}
+mkdir -p "$RUNDIR"
+
 env UID=$(id -u) GID=$(id -g) docker compose pull pulp-docker
 
 env UID=$(id -u) GID=$(id -g) docker compose run --rm \
   -e PS1="\[\033[01;32m\]osic:\[\033[00m\]\[\033[01;34m\]\w\[\033[00m\] $" \
   -e DISPLAY=$DISPLAY \
+  -e XDG_RUNTIME_DIR=$RUNDIR \
+  -v "$RUNDIR:$RUNDIR" \
   -v /tmp/.X11-unix:/tmp/.X11-unix \
   pulp-docker

start_vnc.bat

@@ -46,7 +46,7 @@ if not exist "%DESIGNS%" %ECHO_IF_DRY_RUN% mkdir "%DESIGNS%"
 
 IF "%DOCKER_USER%"=="" SET DOCKER_USER=hpretl
 IF "%DOCKER_IMAGE%"=="" SET DOCKER_IMAGE=iic-osic-tools
-IF "%DOCKER_TAG%"=="" SET DOCKER_TAG=2025.07.pre1
+IF "%DOCKER_TAG%"=="" SET DOCKER_TAG=2025.12
 
 IF "%CONTAINER_USER%"=="" SET CONTAINER_USER=1000
 IF "%CONTAINER_GROUP%"=="" SET CONTAINER_GROUP=1000

start_vnc.sh

@@ -52,7 +52,7 @@ if [ -z ${DOCKER_IMAGE+z} ]; then
 fi
 
 if [ -z ${DOCKER_TAG+z} ]; then
-	DOCKER_TAG="2025.07.pre1"
+	DOCKER_TAG="2025.12"
 fi
 
 if [ -z ${CONTAINER_NAME+z} ]; then