finishing: update PDK to newest version, adapt flow to std cells r0.1.3

Author: thommythomaso

ihp13/pdk

@@ -182,7 +182,7 @@ utl::report "Repair clock inverters"
 repair_clock_inverters
 
 utl::report "Clock Tree Synthesis"
-set_wire_rc -clock -layer Metal4
+set_wire_rc -clock -layer Metal3
 clock_tree_synthesis -buf_list $ctsBuf -root_buf $ctsBufRoot \
                      -sink_clustering_enable \
                      -obstruction_aware \

openroad/scripts/chip.tcl

@@ -88,6 +88,7 @@ set core_topY     [lindex $coreArea 3]
 # We need to define the metal tracks 
 # (where the wires on each metal should go)
 # this function is defined in init_tech.tcl
+utl::report "Create Tracks"
 makeTracks
 
 # the height of a standard cell, useful to align things
@@ -104,8 +105,8 @@ source src/instances.tcl
 # Placing 
 ##########################################################################
 # use these for macro placement
-set floorPaddingX      20.0
-set floorPaddingY      20.0
+set floorPaddingX      16.0
+set floorPaddingY      16.0
 set floor_leftX       [expr $core_leftX + $floorPaddingX]
 set floor_bottomY     [expr $core_bottomY + $floorPaddingY]
 set floor_rightX      [expr $core_rightX - $floorPaddingX]
@@ -126,4 +127,4 @@ set Y [expr $Y - $RamSize256x64_H - 15]
 placeInstance $bank1_sram0 $X $Y R0
 
 
-cut_rows -halo_width_x 2 -halo_width_y 1
+cut_rows -halo_width_x 5 -halo_width_y 2

openroad/scripts/floorplan.tcl

@@ -62,7 +62,7 @@ read_lef ${pdk_cells_lef}/sg13g2_stdcell.lef
 read_lef ${pdk_io_lef}/sg13g2_io.lef
 read_lef ${pdk_pad_lef}/bondpad_70x70.lef
 
-foreach file [glob -directory $pdk_sram_lef *.lef] {
+foreach file [glob -directory $pdk_sram_lef RM_IHPSG13*.lef] {
 	read_lef "$file"
 }
 
@@ -79,11 +79,11 @@ set dont_use_cells sg13g2_IOPad*
 
 proc makeTracks {} {
     utl::report "Metal Tracks"
-	make_tracks Metal1    -x_offset 0 -x_pitch 0.48 -y_offset 0 -y_pitch 0.48
-	make_tracks Metal2    -x_offset 0 -x_pitch 0.42 -y_offset 0 -y_pitch 0.42
-	make_tracks Metal3    -x_offset 0 -x_pitch 0.48 -y_offset 0 -y_pitch 0.48
-	make_tracks Metal4    -x_offset 0 -x_pitch 0.42 -y_offset 0 -y_pitch 0.42
-	make_tracks Metal5    -x_offset 0 -x_pitch 0.48 -y_offset 0 -y_pitch 0.48
-	make_tracks TopMetal1 -x_offset 1.46 -x_pitch 2.28 -y_offset 1.46 -y_pitch 2.28
+	make_tracks Metal1    -x_offset 0 -x_pitch 0.42 -y_offset 0 -y_pitch 0.42
+	make_tracks Metal2    -x_offset 0 -x_pitch 0.48 -y_offset 0 -y_pitch 0.48
+	make_tracks Metal3    -x_offset 0 -x_pitch 0.42 -y_offset 0 -y_pitch 0.42
+	make_tracks Metal4    -x_offset 0 -x_pitch 0.48 -y_offset 0 -y_pitch 0.48
+	make_tracks Metal5    -x_offset 0 -x_pitch 0.42 -y_offset 0 -y_pitch 0.42
+	make_tracks TopMetal1 -x_offset 1.64 -x_pitch 2.28 -y_offset 1.64 -y_pitch 2.28
 	make_tracks TopMetal2 -x_offset 2.00 -x_pitch 4.00 -y_offset 2.00 -y_pitch 4.00
 }

openroad/scripts/init_tech.tcl

@@ -29,18 +29,20 @@ if {[info exists power_grid_defined]} {
 ##  Power settings
 ##########################################################################
 # Core Power Ring
-## Offset from core to power ring
-set pgcrOffset 2
+## Space between pads and core -> used for power ring
+set PowRingSpace  35
 ## Spacing must meet TM2 rules
-set pgcrSpacing 6
+set pgcrSpacing 4
 ## Width must meet TM2 rules
-set pgcrWidth 10
+set pgcrWidth 8
+## Offset from core to power ring
+set pgcrOffset [expr ($PowRingSpace - $pgcrSpacing - 2 * $pgcrWidth) / 2]
 
-# TopMetal2 Core Power Grid
-set tpg2Width     6; # arbitrary number
-set tpg2Pitch   204; # multiple of pad-pitch
-set tpg2Spacing  60; # big enough to skip over a pad
-set tpg2Offset   97; # offset from leftX of core
+# TopMetal1 Core Power Grid
+set tpg1Width     3; # arbitrary number
+set tpg1Pitch   228; # multiple of pad-pitch
+set tpg1Spacing  60; # big enough to skip over a pad
+set tpg1Offset   97; # offset from leftX of core
 
 # Macro Power Rings -> M3 and M2
 ## Spacing must be larger than pitch of M2/M3
@@ -52,7 +54,7 @@ set mprOffsetX 2.4
 set mprOffsetY 0.6
 
 # macro power grid (stripes on TopMetal1/TopMetal2 depending on orientation)
-set mpgWidth 6
+set mpgWidth 3
 set mpgSpacing 4
 set mpgOffset 20; # arbitrary
 
@@ -83,18 +85,18 @@ proc sram_power { name macro } {
         set stripe_dist [expr $stripe_dist/2]
     }
 
-    add_pdn_stripe -grid ${name}_grid -layer {TopMetal1} -width $mpgWidth -spacing $mpgSpacing \
+    add_pdn_stripe -grid ${name}_grid -layer {Metal5} -width $mpgWidth -spacing $mpgSpacing \
                    -pitch $stripe_dist -offset $mpgOffset -extend_to_core_ring -starts_with POWER -snap_to_grid
 
     # Connection of Macro Power Ring to standard-cell rails
-    add_pdn_connect -grid ${name}_grid -layers {Metal3 Metal1}
+    add_pdn_connect -grid ${name}_grid -layers {Metal4 Metal2}
+    add_pdn_connect -grid ${name}_grid -layers {Metal4 Metal1}
     # Connection of Stripes on Macro to Macro Power Ring
-    add_pdn_connect -grid ${name}_grid -layers {TopMetal1 Metal3}
-    add_pdn_connect -grid ${name}_grid -layers {TopMetal1 Metal4}
+    add_pdn_connect -grid ${name}_grid -layers {Metal5 Metal4}
     # Connection of Stripes on Macro to Macro Power Pins
     # add_pdn_connect -grid ${name}_grid -layers {TopMetal1 Metal4}
     # Connection of Stripes on Macro to Core Power Stripes
-    add_pdn_connect -grid ${name}_grid -layers {TopMetal2 TopMetal1}
+    add_pdn_connect -grid ${name}_grid -layers {TopMetal1 Metal5}
 }
 
 
@@ -112,28 +114,27 @@ add_pdn_ring -grid {core_grid} \
    -connect_to_pad_layers TopMetal2
 
 # M1 Standardcell Rows (tracks)
-add_pdn_stripe -grid {core_grid} -layer {Metal1} -width {0.44} -offset {0} \
+add_pdn_stripe -grid {core_grid} -layer {Metal1} -width {0.32} -offset {0} \
                -followpins -extend_to_core_ring
 
 
 sram_power "sram_256x64"  "RM_IHPSG13_1P_256x64_c2_bm_bist"
 
 # Top power grid
-# Top 2 Stripe
-add_pdn_stripe -grid {core_grid} -layer {TopMetal2} -width $tpg2Width \
-               -pitch $tpg2Pitch -spacing $tpg2Spacing -offset $tpg2Offset \
-               -extend_to_core_ring -snap_to_grid -number_of_straps 7
+# Top 1 Stripe
+add_pdn_stripe  -grid {core_grid} -layer {TopMetal1} -width $tpg1Width \
+                -pitch $tpg1Pitch -spacing $tpg1Spacing -offset $tpg1Offset \
+                -extend_to_core_ring -snap_to_grid -number_of_straps 7
 
 # "The add_pdn_connect command is used to define which layers in the power grid are to be connected together.
 #  During power grid generation, vias will be added for overlapping power nets and overlapping ground nets."
-# M1 is declared vertical but tracks still horizontal
-# vertical TopMetal2 to below horizonals (M1 has horizontal power tracks)
-add_pdn_connect -grid {core_grid} -layers {TopMetal2 Metal1}
-add_pdn_connect -grid {core_grid} -layers {TopMetal2 Metal2}
-add_pdn_connect -grid {core_grid} -layers {TopMetal2 Metal4}
-# add_pdn_connect -grid {core_grid} -layers {TopMetal2 TopMetal1}
+# vertical TopMetal1 to below horizonals (M1 has horizontal power tracks)
+add_pdn_connect -grid {core_grid} -layers {TopMetal1 Metal1}
+add_pdn_connect -grid {core_grid} -layers {TopMetal1 Metal3}
+add_pdn_connect -grid {core_grid} -layers {TopMetal1 Metal5}
 # power ring to standard cell rails
 add_pdn_connect -grid {core_grid} -layers {Metal3 Metal2}
+add_pdn_connect -grid {core_grid} -layers {Metal2 Metal1}
 
 
 ##########################################################################