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rtl: refactor testbench
- move testbench helper tasks into VIP module - add testbench package - group simulation-only files into dedicated rtl/test directory
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Bender.yml

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@@ -63,7 +63,9 @@ sources:
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- target: any(simulation, verilator)
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files:
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- rtl/tb_croc_soc.sv
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- rtl/test/tb_croc_pkg.sv
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- rtl/test/croc_vip.sv
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- rtl/test/tb_croc_soc.sv
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- target: genesys2
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files:

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