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| 1 | +/* |
| 2 | + |
| 3 | + * |
| 4 | + * Copyright 2023 ETH Zurich and University of Bologna |
| 5 | + * |
| 6 | + * Licensed under the Apache License, Version 2.0 (the "License"); |
| 7 | + * you may not use this file except in compliance with the License. |
| 8 | + * You may obtain a copy of the License at |
| 9 | + * |
| 10 | + * http://www.apache.org/licenses/LICENSE-2.0 |
| 11 | + * |
| 12 | + * Unless required by applicable law or agreed to in writing, software |
| 13 | + * distributed under the License is distributed on an "AS IS" BASIS, |
| 14 | + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 15 | + * See the License for the specific language governing permissions and |
| 16 | + * limitations under the License. |
| 17 | + * |
| 18 | + * SPDX-License-Identifier: Apache-2.0 |
| 19 | + */ |
| 20 | + |
| 21 | +#include "neureka_pulp_cluster_bsp.h" |
| 22 | +#include "pulp.h" |
| 23 | + |
| 24 | +#define NEUREKA_PULP_CLUSTER_CLUSTER_CTRL_BASE_ADDR (ARCHI_CLUSTER_CTRL_ADDR) |
| 25 | +#define NEUREKA_PULP_CLUSTER_CLUSTER_CTRL_HWPE_OFFS 0x18 |
| 26 | +#define NEUREKA_PULP_CLUSTER_CLUSTER_CTRL_HWPE_ADDR \ |
| 27 | + (NEUREKA_PULP_CLUSTER_CLUSTER_CTRL_BASE_ADDR + \ |
| 28 | + NEUREKA_PULP_CLUSTER_CLUSTER_CTRL_HWPE_OFFS) |
| 29 | +#define NEUREKA_PULP_CLUSTER_CLUSTER_CTRL_HWPE_MASK_CG_EN 0x800 |
| 30 | +#define NEUREKA_PULP_CLUSTER_CLUSTER_CTRL_HWPE_MASK_NEUREKA_SEL 0x2000 |
| 31 | +#define NEUREKA_PULP_CLUSTER_CLUSTER_CTRL_HWPE_MASK_HCI_PRIO 0x100 |
| 32 | +#define NEUREKA_PULP_CLUSTER_CLUSTER_CTRL_HWPE_MASK_HCI_MAXSTALL 0xff |
| 33 | +#define NEUREKA_PULP_CLUSTER_MAX_STALL (8) |
| 34 | +#define NEUREKA_PULP_CLUSTER_EVENT (1 << 12) |
| 35 | +#define NEUREKA_PULP_CLUSTER_BASE_ADDR (ARCHI_HWCE_ADDR) |
| 36 | + |
| 37 | +void neureka_pulp_cluster_cg_enable() { |
| 38 | + *(volatile uint32_t *)NEUREKA_PULP_CLUSTER_CLUSTER_CTRL_HWPE_ADDR |= |
| 39 | + NEUREKA_PULP_CLUSTER_CLUSTER_CTRL_HWPE_MASK_CG_EN; |
| 40 | +} |
| 41 | + |
| 42 | +void neureka_pulp_cluster_cg_disable() { |
| 43 | + *(volatile uint32_t *)NEUREKA_PULP_CLUSTER_CLUSTER_CTRL_HWPE_ADDR &= |
| 44 | + ~NEUREKA_PULP_CLUSTER_CLUSTER_CTRL_HWPE_MASK_CG_EN; |
| 45 | +} |
| 46 | + |
| 47 | +void neureka_pulp_cluster_neureka_select() { |
| 48 | + *(volatile uint32_t *)NEUREKA_PULP_CLUSTER_CLUSTER_CTRL_HWPE_ADDR |= |
| 49 | + NEUREKA_PULP_CLUSTER_CLUSTER_CTRL_HWPE_MASK_NEUREKA_SEL; |
| 50 | +} |
| 51 | + |
| 52 | +void neureka_pulp_cluster_neureka_unselect() { |
| 53 | + *(volatile uint32_t *)NEUREKA_PULP_CLUSTER_CLUSTER_CTRL_HWPE_ADDR &= |
| 54 | + ~NEUREKA_PULP_CLUSTER_CLUSTER_CTRL_HWPE_MASK_NEUREKA_SEL; |
| 55 | +} |
| 56 | + |
| 57 | +void neureka_pulp_cluster_hci_setpriority_neureka() { |
| 58 | + *(volatile uint32_t *)NEUREKA_PULP_CLUSTER_CLUSTER_CTRL_HWPE_ADDR |= |
| 59 | + NEUREKA_PULP_CLUSTER_CLUSTER_CTRL_HWPE_MASK_HCI_PRIO; |
| 60 | +} |
| 61 | + |
| 62 | +void neureka_pulp_cluster_hci_setpriority_core() { |
| 63 | + *(volatile uint32_t *)NEUREKA_PULP_CLUSTER_CLUSTER_CTRL_HWPE_ADDR &= |
| 64 | + ~NEUREKA_PULP_CLUSTER_CLUSTER_CTRL_HWPE_MASK_HCI_PRIO; |
| 65 | +} |
| 66 | + |
| 67 | +void neureka_pulp_cluster_hci_reset_max_stall() { |
| 68 | + *(volatile uint32_t *)NEUREKA_PULP_CLUSTER_CLUSTER_CTRL_HWPE_ADDR &= |
| 69 | + ~NEUREKA_PULP_CLUSTER_CLUSTER_CTRL_HWPE_MASK_HCI_MAXSTALL; |
| 70 | +} |
| 71 | + |
| 72 | +void neureka_pulp_cluster_hci_set_max_stall(uint32_t max_stall) { |
| 73 | + *(volatile uint32_t *)NEUREKA_PULP_CLUSTER_CLUSTER_CTRL_HWPE_ADDR |= |
| 74 | + max_stall & NEUREKA_PULP_CLUSTER_CLUSTER_CTRL_HWPE_MASK_HCI_MAXSTALL; |
| 75 | +} |
| 76 | + |
| 77 | +void neureka_pulp_cluster_open(neureka_pulp_cluster_conf_t *conf) { |
| 78 | + neureka_pulp_cluster_cg_enable(); |
| 79 | + neureka_pulp_cluster_neureka_select(); |
| 80 | + neureka_pulp_cluster_hci_setpriority_neureka(); |
| 81 | + neureka_pulp_cluster_hci_set_max_stall(conf->max_stall); |
| 82 | +} |
| 83 | + |
| 84 | +void neureka_pulp_cluster_close() { |
| 85 | + neureka_pulp_cluster_cg_disable(); |
| 86 | + neureka_pulp_cluster_neureka_unselect(); |
| 87 | + neureka_pulp_cluster_hci_reset_max_stall(); |
| 88 | + neureka_pulp_cluster_hci_setpriority_core(); |
| 89 | +} |
| 90 | + |
| 91 | +void neureka_pulp_cluster_event_wait_and_clear() { |
| 92 | + eu_evt_maskWaitAndClr(NEUREKA_PULP_CLUSTER_EVENT); |
| 93 | +} |
| 94 | + |
| 95 | +static const neureka_dev_t neureka_pulp_cluster_dev = { |
| 96 | + .hwpe_dev = (struct hwpe_dev_t){ |
| 97 | + .base_addr = (volatile uint32_t *)NEUREKA_PULP_CLUSTER_BASE_ADDR}}; |
| 98 | + |
| 99 | +const neureka_dev_t *neureka_pulp_cluster_get_dev() { |
| 100 | + return &neureka_pulp_cluster_dev; |
| 101 | +} |
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