hw: Generalize DMMCAST instruction and MCAST CSR

Author: colluca

hw/snitch/src/riscv_instr.sv

@@ -327,7 +327,7 @@ package riscv_instr;
   localparam logic [31:0] DMSTAT             = 32'b0000101?????00000000?????0101011;
   localparam logic [31:0] DMSTR              = 32'b0000110??????????000000000101011;
   localparam logic [31:0] DMREP              = 32'b000011100000?????000000000101011;
-  localparam logic [31:0] DMMCAST            = 32'b000100000000?????000000000101011;
+  localparam logic [31:0] DMUSER             = 32'b0001000??????????000000000101011;
   localparam logic [31:0] FREP_O             = 32'b????????????????????????10001011;
   localparam logic [31:0] IREP               = 32'b?????????????????????????0111111;
   localparam logic [31:0] SCFGRI             = 32'b????????????00000001?????0101011;
@@ -1140,7 +1140,8 @@ package riscv_instr;
   localparam logic [11:0] CSR_FPMODE = 12'h7c1;
   localparam logic [11:0] CSR_BARRIER = 12'h7c2;
   localparam logic [11:0] CSR_SC = 12'h7c3;
-  localparam logic [11:0] CSR_MCAST = 12'h7c4;
+  localparam logic [11:0] CSR_USER_LOW = 12'h7c4;
+  localparam logic [11:0] CSR_USER_HIGH = 12'h7c5;
   localparam logic [11:0] CSR_HTIMEDELTAH = 12'h615;
   localparam logic [11:0] CSR_CYCLEH = 12'hc80;
   localparam logic [11:0] CSR_TIMEH = 12'hc81;

hw/snitch/src/snitch.sv

@@ -247,8 +247,10 @@ module snitch import snitch_pkg::*; import riscv_instr::*; #(
   logic csr_en;
   logic csr_dump;
   logic csr_stall_d, csr_stall_q;
-  // Multicast mask
-  logic [31:0] csr_mcast_d, csr_mcast_q;
+
+  // User Field
+  logic [31:0] csr_user_high_d, csr_user_high_q;
+  logic [31:0] csr_user_low_d, csr_user_low_q;
 
   localparam logic M = 0;
   localparam logic S = 1;
@@ -320,7 +322,8 @@ module snitch import snitch_pkg::*; import riscv_instr::*; #(
   end
 
   `FFAR(csr_stall_q, csr_stall_d, '0, clk_i, rst_i)
-  `FFAR(csr_mcast_q, csr_mcast_d, '0, clk_i, rst_i)
+  `FFAR(csr_user_high_q, csr_user_high_d, '0, clk_i, rst_i)
+  `FFAR(csr_user_low_q, csr_user_low_d, '0, clk_i, rst_i)
 
   typedef struct packed {
     fpnew_pkg::fmt_mode_t  fmode;
@@ -2152,6 +2155,7 @@ module snitch import snitch_pkg::*; import riscv_instr::*; #(
       // DMA instructions
       DMSRC,
       DMDST,
+      DMUSER,
       DMSTR: begin
         if (Xdma) begin
           acc_qreq_o.addr  = DMA_SS;
@@ -2221,16 +2225,6 @@ module snitch import snitch_pkg::*; import riscv_instr::*; #(
           illegal_inst = 1'b1;
         end
       end
-      DMMCAST: begin
-        if (Xdma) begin
-          acc_qreq_o.addr = DMA_SS;
-          opa_select      = Reg;
-          acc_qvalid_o    = valid_instr;
-          write_rd        = 1'b0;
-        end else begin
-          illegal_inst = 1'b1;
-        end
-      end
       SCFGRI: begin
         if (Xssr) begin
           write_rd = 1'b0;
@@ -2358,7 +2352,8 @@ module snitch import snitch_pkg::*; import riscv_instr::*; #(
     dscratch_d = dscratch_q;
 
     csr_stall_d = csr_stall_q;
-    csr_mcast_d = csr_mcast_q;
+    csr_user_high_d = csr_user_high_q;
+    csr_user_low_d = csr_user_low_q;
 
     if (barrier_i) csr_stall_d = 1'b0;
     barrier_o = 1'b0;
@@ -2585,10 +2580,15 @@ module snitch import snitch_pkg::*; import riscv_instr::*; #(
             barrier_o = 1'b1;
             csr_stall_d = 1'b1;
           end
-          // Multicast mask
-          CSR_MCAST: begin
-            csr_rvalue = csr_mcast_q;
-            csr_mcast_d = alu_result[31:0];
+          // User field high
+          CSR_USER_HIGH: begin
+            csr_rvalue = csr_user_high_q;
+            csr_user_high_d = alu_result[31:0];
+          end
+          // User field low
+          CSR_USER_LOW: begin
+            csr_rvalue = csr_user_low_q;
+            csr_user_low_d = alu_result[31:0];
           end
           default: begin
             csr_rvalue = '0;
@@ -2890,6 +2890,7 @@ module snitch import snitch_pkg::*; import riscv_instr::*; #(
   snitch_lsu #(
     .AddrWidth (AddrWidth),
     .DataWidth (DataWidth),
+    .UserWidth (64),
     .dreq_t (dreq_t),
     .drsp_t (drsp_t),
     .tag_t (logic[RegWidth-1:0]),
@@ -2910,7 +2911,7 @@ module snitch import snitch_pkg::*; import riscv_instr::*; #(
     .lsu_qsize_i (ls_size),
     .lsu_qamo_i (ls_amo),
     .lsu_qrepd_i (1'b0),
-    .lsu_qmcast_i (addr_t'(csr_mcast_q)),
+    .lsu_quser_i ({csr_user_high_q, csr_user_low_q}),
     .lsu_qvalid_i (lsu_qvalid),
     .lsu_qready_o (lsu_qready),
     .lsu_pdata_o (ld_result),

hw/snitch/src/snitch_lsu.sv

@@ -11,6 +11,7 @@
 module snitch_lsu #(
   parameter int unsigned AddrWidth           = 32,
   parameter int unsigned DataWidth           = 32,
+  parameter int unsigned UserWidth           = 0,
   /// Tag passed from input to output. All transactions are in-order.
   parameter type tag_t                       = logic [4:0],
   /// Number of outstanding memory transactions.
@@ -37,7 +38,8 @@ module snitch_lsu #(
   parameter type         drsp_t              = logic,
   /// Derived parameter *Do not override*
   parameter type addr_t = logic [AddrWidth-1:0],
-  parameter type data_t = logic [DataWidth-1:0]
+  parameter type data_t = logic [DataWidth-1:0],
+  parameter type user_t = logic [UserWidth-1:0]
 ) (
   input  logic                 clk_i,
   input  logic                 rst_i,
@@ -50,7 +52,7 @@ module snitch_lsu #(
   input  logic [1:0]           lsu_qsize_i,
   input  reqrsp_pkg::amo_op_e  lsu_qamo_i,
   input  logic                 lsu_qrepd_i,  // Whether this is a sequencer repetition
-  input  addr_t                lsu_qmcast_i,  // Multicast mask
+  input  user_t                lsu_quser_i,  // User field for the axi transmission
   input  logic                 lsu_qvalid_i,
   output logic                 lsu_qready_o,
   // response channel
@@ -254,7 +256,7 @@ module snitch_lsu #(
   assign data_req_o.q_valid = lsu_postcaq_qvalid & (lsu_qwrite_i | ~laq_full) & ~mem_full;
   assign data_req_o.q.write = lsu_qwrite_i;
   assign data_req_o.q.addr = lsu_qaddr_i;
-  assign data_req_o.q.mask = lsu_qmcast_i;
+  assign data_req_o.q.user = lsu_quser_i;
   assign data_req_o.q.amo  = lsu_qamo_i;
   assign data_req_o.q.size = lsu_qsize_i;