hw: Expose cluster base offset to calculate addrmap size

Author: colluca

hw/snitch_cluster/src/snitch_cluster.sv

@@ -267,6 +267,9 @@ module snitch_cluster
   /// Base address of cluster. TCDM and cluster peripheral location are derived from
   /// it. This signal is pseudo-static.
   input  logic [PhysicalAddrWidth-1:0]            cluster_base_addr_i,
+  /// Base address of cluster. TCDM and cluster peripheral location are derived from
+  /// it. This signal is pseudo-static.
+  input  logic [PhysicalAddrWidth-1:0]            cluster_base_offset_i,
   /// Configuration inputs for the memory cuts used in implementation.
   /// These signals are pseudo-static.
   input  sram_cfgs_t                              sram_cfgs_i,
@@ -564,6 +567,9 @@ module snitch_cluster
   assign ext_mem_start_address = zero_mem_end_address;
   assign ext_mem_end_address   = ext_mem_start_address + ExtMemorySize * 1024;
 
+  addr_t cluster_end_address;
+  assign cluster_end_address = cluster_base_addr_i + cluster_base_offset_i;
+
   localparam addr_t TCDMAliasStart = AliasRegionBase & TCDMMask;
   localparam addr_t TCDMAliasEnd   = (TCDMAliasStart + TCDMSizeNapotRounded) & TCDMMask;
 
@@ -692,7 +698,7 @@ module snitch_cluster
   assign dma_xbar_default_rule = '{
     idx: dma_xbar_default_port,
     start_addr: tcdm_start_address,
-    end_addr: zero_mem_end_address
+    end_addr: cluster_end_address
   };
 
   // Define the address map for the wide XBAR

hw/snitch_cluster/src/snitch_cluster_pkg.sv.tpl

@@ -247,8 +247,9 @@ ${ssr_cfg(core, '{reg_idx}', '/*None*/ 0', ',')}\
   };
 
   // Forward potentially optional configuration parameters
-  localparam logic [9:0] CfgBaseHartId      =  (${to_sv_hex(cfg['cluster']['cluster_base_hartid'], 10)});
-  localparam addr_t    	 CfgClusterBaseAddr = (${to_sv_hex(cfg['cluster']['cluster_base_addr'], cfg['cluster']['addr_width'])});
+  localparam logic [9:0] CfgBaseHartId        = (${to_sv_hex(cfg['cluster']['cluster_base_hartid'], 10)});
+  localparam addr_t    	 CfgClusterBaseAddr   = (${to_sv_hex(cfg['cluster']['cluster_base_addr'], cfg['cluster']['addr_width'])});
+  localparam addr_t    	 CfgClusterBaseOffset = (${to_sv_hex(cfg['cluster']['cluster_base_offset'], cfg['cluster']['addr_width'])});
 
 endpackage
 // verilog_lint: waive-stop package-filename

hw/snitch_cluster/src/snitch_cluster_wrapper.sv.tpl

@@ -44,6 +44,7 @@ module ${cfg['cluster']['name']}_wrapper (
   input  logic [${cfg['cluster']['name']}_pkg::NrCores-1:0] mxip_i,
   input  logic [9:0]                             hart_base_id_i,
   input  logic [${cfg['cluster']['addr_width']-1}:0]                            cluster_base_addr_i,
+  input  logic [${cfg['cluster']['addr_width']-1}:0]                            cluster_base_offset_i,
   input  logic                                   clk_d2_bypass_i,
   input  ${cfg['cluster']['name']}_pkg::sram_cfgs_t         sram_cfgs_i,
   input  ${cfg['cluster']['name']}_pkg::narrow_in_req_t     narrow_in_req_i,
@@ -198,9 +199,11 @@ module ${cfg['cluster']['name']}_wrapper (
 % if cfg['cluster']['cluster_base_expose']:
     .hart_base_id_i,
     .cluster_base_addr_i,
+    .cluster_base_offset_i,
 % else:
     .hart_base_id_i (snitch_cluster_pkg::CfgBaseHartId),
     .cluster_base_addr_i (snitch_cluster_pkg::CfgClusterBaseAddr),
+    .cluster_base_offset_i (snitch_cluster_pkg::CfgClusterBaseOffset),
 % endif
 % if cfg['cluster']['timing']['iso_crossings']:
     .clk_d2_bypass_i,

util/clustergen/snitch_cluster.schema.json

@@ -28,6 +28,11 @@
                     "description": "Base address of this cluster.",
                     "default": 0
                 },
+                "cluster_base_offset": {
+                    "type": "number",
+                    "description": "Address offset between successive clusters.",
+                    "default": 0
+                },
                 "tcdm": {
                     "type": "object",
                     "description": "Configuration of the Tightly Coupled Data Memory of this cluster.",
@@ -238,7 +243,7 @@
                 },
                 "cluster_base_expose": {
                     "type": "boolean",
-                    "description": "Whether to expose base_addr and base_hart_id",
+                    "description": "Whether to expose base_addr, base_offset and base_hart_id",
                     "default": false
                 },
                 "sram_cfg_expose": {