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lib/tiam1808: trim trailing whitespace
Trim all of the trailing whitespace from all files in the in the `lib/tiam1808` directory. This way, if we want to modify a file in the future, we don't have to deal with it.
1 parent c5985df commit 0a9819d

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132 files changed

+2977
-2977
lines changed

lib/tiam1808/drivers/cppi41dma.c

Lines changed: 190 additions & 190 deletions
Large diffs are not rendered by default.

lib/tiam1808/drivers/cpsw.c

Lines changed: 153 additions & 153 deletions
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lib/tiam1808/drivers/cpu.c

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -43,7 +43,7 @@
4343
******************************************************************************/
4444
/**
4545
* \brief This API can be used to switch from user mode to privileged mode
46-
* The priviledge mode will be system mode. System mode will share
46+
* The priviledge mode will be system mode. System mode will share
4747
* the same resources as user mode, but with privileges.
4848
*
4949
* \param None.
@@ -59,7 +59,7 @@ void CPUSwitchToPrivilegedMode(void)
5959
}
6060

6161
/**
62-
* \brief This API can be used to switch from any previleged mode of ARM to
62+
* \brief This API can be used to switch from any previleged mode of ARM to
6363
* user mode. After this API is called, the program will continue
6464
* to operate in non-privileged mode, until any exception occurs.
6565
* After the exception is serviced, execution will continue in user
@@ -83,13 +83,13 @@ void CPUSwitchToUserMode(void)
8383
/**
8484
* \brief This API is called when the CPU is aborted or during execution
8585
* of any undefined instruction. Both IRQ and FIQ will be disabled
86-
* when the CPU gets an abort and calls this API.
86+
* when the CPU gets an abort and calls this API.
8787
*
8888
* \param None.
8989
*
9090
* \return None.
9191
*
92-
* Note : The user can perform error handling such as an immediate reset
92+
* Note : The user can perform error handling such as an immediate reset
9393
* inside this API if required.
9494
**/
9595
void CPUAbortHandler(void)
@@ -109,7 +109,7 @@ unsigned int CPUIntStatus(void)
109109
/* IRQ and FIQ in CPSR */
110110
__asm(" mrs r0, CPSR\n\t"
111111
" and %[result], r0, #0xC0" : [result] "=r" (stat));
112-
112+
113113
return stat;
114114
}
115115

lib/tiam1808/drivers/dmtimer.c

Lines changed: 39 additions & 39 deletions
Original file line numberDiff line numberDiff line change
@@ -55,7 +55,7 @@
5555
*******************************************************************************/
5656

5757
/**
58-
* \brief This API will start the timer.
58+
* \brief This API will start the timer.
5959
*
6060
* \param baseAdd Base Address of the DMTimer Module Register.
6161
*
@@ -71,7 +71,7 @@ void DMTimerEnable(unsigned int baseAdd)
7171
}
7272

7373
/**
74-
* \brief This API will stop the timer.
74+
* \brief This API will stop the timer.
7575
*
7676
* \param baseAdd Base Address of the DMTimer Module Register.
7777
*
@@ -85,9 +85,9 @@ void DMTimerDisable(unsigned int baseAdd)
8585
}
8686

8787
/**
88-
* \brief This API will configure the timer in combinations of
89-
* 'One Shot timer' and 'Compare' Mode or 'Auto-reload timer'
90-
* and 'Compare' Mode.
88+
* \brief This API will configure the timer in combinations of
89+
* 'One Shot timer' and 'Compare' Mode or 'Auto-reload timer'
90+
* and 'Compare' Mode.
9191
*
9292
* \param baseAdd Base Address of the DMTimer Module Register.
9393
* \param timerMode Mode for enabling the timer.
@@ -96,7 +96,7 @@ void DMTimerDisable(unsigned int baseAdd)
9696
* DMTIMER_ONESHOT_CMP_ENABLE - One shot and compare mode enabled \n
9797
* DMTIMER_ONESHOT_NOCMP_ENABLE - One shot enabled, compare mode disabled \n
9898
* DMTIMER_AUTORLD_CMP_ENABLE - Auto-reload and compare mode enabled \n
99-
* DMTIMER_AUTORLD_NOCMP_ENABLE - Auto-reload enabled, compare mode
99+
* DMTIMER_AUTORLD_NOCMP_ENABLE - Auto-reload enabled, compare mode
100100
* disabled \n
101101
*
102102
* \return None.
@@ -108,7 +108,7 @@ void DMTimerModeConfigure(unsigned int baseAdd, unsigned int timerMode)
108108
HWREG(baseAdd + DMTIMER_TCLR) &= ~(DMTIMER_TCLR_AR | DMTIMER_TCLR_CE);
109109

110110
/* Set the timer mode in TCLR register */
111-
HWREG(baseAdd + DMTIMER_TCLR) |= (timerMode & (DMTIMER_TCLR_AR |
111+
HWREG(baseAdd + DMTIMER_TCLR) |= (timerMode & (DMTIMER_TCLR_AR |
112112
DMTIMER_TCLR_CE));
113113
}
114114

@@ -162,7 +162,7 @@ void DMTimerPreScalerClkDisable(unsigned int baseAdd)
162162
*
163163
* \return None.
164164
*
165-
* \note Value can be loaded into the counter register when the counter is
165+
* \note Value can be loaded into the counter register when the counter is
166166
* stopped or when it is running.
167167
**/
168168
void DMTimerCounterSet(unsigned int baseAdd, unsigned int counter)
@@ -196,7 +196,7 @@ unsigned int DMTimerCounterGet(unsigned int baseAdd)
196196
*
197197
* \return None.
198198
*
199-
* \note: It is recommended to not use reload value as 0xFFFFFFFF as it can
199+
* \note: It is recommended to not use reload value as 0xFFFFFFFF as it can
200200
* lead to undesired results.
201201
**/
202202
void DMTimerReloadSet(unsigned int baseAdd, unsigned int reload)
@@ -223,7 +223,7 @@ unsigned int DMTimerReloadGet(unsigned int baseAdd)
223223
* \brief Configure and enable PWM feature of DMTimer.
224224
*
225225
* \param baseAdd Base Address of the DMTimer Module Register.
226-
* \param ptMode Pulse or toggle mode also positive or negative pulse
226+
* \param ptMode Pulse or toggle mode also positive or negative pulse
227227
* for PWM pin.
228228
* \param trgOpMode Trigger output mode on PWM pin.
229229
*
@@ -244,11 +244,11 @@ void DMTimerPWMEnable(unsigned int baseAdd, unsigned int ptMode,
244244
unsigned int trgOpMode)
245245
{
246246
/* Clear the PT, and TRG field of TCLR */
247-
HWREG(baseAdd + DMTIMER_TCLR) &= ~(DMTIMER_TCLR_PT | DMTIMER_TCLR_TRG |
248-
DMTIMER_TCLR_SCPWM);
247+
HWREG(baseAdd + DMTIMER_TCLR) &= ~(DMTIMER_TCLR_PT | DMTIMER_TCLR_TRG |
248+
DMTIMER_TCLR_SCPWM);
249249

250250
/* Write to TCLR */
251-
HWREG(baseAdd + DMTIMER_TCLR) |= ((ptMode | trgOpMode) & (DMTIMER_TCLR_PT |
251+
HWREG(baseAdd + DMTIMER_TCLR) |= ((ptMode | trgOpMode) & (DMTIMER_TCLR_PT |
252252
DMTIMER_TCLR_TRG | DMTIMER_TCLR_SCPWM));
253253
}
254254

@@ -257,9 +257,9 @@ void DMTimerPWMEnable(unsigned int baseAdd, unsigned int ptMode,
257257
*
258258
* \param baseAdd Base Address of the DMTimer Module Register.
259259
*
260-
* \return None.
260+
* \return None.
261261
*
262-
* \note: Modulation on PWM pin is stopped only after this API is called
262+
* \note: Modulation on PWM pin is stopped only after this API is called
263263
* and overflow occurs.
264264
**/
265265
void DMTimerPWMDisable(unsigned int baseAdd)
@@ -288,15 +288,15 @@ void DMTimerPWMDisable(unsigned int baseAdd)
288288
* \return None.
289289
*
290290
**/
291-
void DMTimerCaptureConfigure(unsigned int baseAdd, unsigned int tcm,
291+
void DMTimerCaptureConfigure(unsigned int baseAdd, unsigned int tcm,
292292
unsigned int captMode)
293293
{
294294
/* Clear the TCM and CAPT_MODE fields of TCLR */
295-
HWREG(baseAdd + DMTIMER_TCLR) &= ~(DMTIMER_TCLR_TCM |
295+
HWREG(baseAdd + DMTIMER_TCLR) &= ~(DMTIMER_TCLR_TCM |
296296
DMTIMER_TCLR_CAPT_MODE);
297297

298298
/* Write tcm and captMode fields to TCLR */
299-
HWREG(baseAdd + DMTIMER_TCLR) |= ((tcm | captMode) & (DMTIMER_TCLR_TCM |
299+
HWREG(baseAdd + DMTIMER_TCLR) |= ((tcm | captMode) & (DMTIMER_TCLR_TCM |
300300
DMTIMER_TCLR_CAPT_MODE));
301301
}
302302

@@ -305,10 +305,10 @@ void DMTimerCaptureConfigure(unsigned int baseAdd, unsigned int tcm,
305305
*
306306
* \param baseAdd Base Address of the DMTimer Module Register.
307307
* \param gpoCfg General purpose output.
308-
*
308+
*
309309
* 'gpoCfg' can take the following values \n
310310
* DMTIMER_GPO_CFG_0 - PORGPOCFG drives 0 \n
311-
* DMTIMER_GPO_CFG_1 - PORGPOCFG drives 1 \n
311+
* DMTIMER_GPO_CFG_1 - PORGPOCFG drives 1 \n
312312
*
313313
* \return None.
314314
*
@@ -389,7 +389,7 @@ unsigned int DMTimerCapture2Get(unsigned int baseAdd)
389389
* DMTIMER_EMUFREE_FREE - Emulation mode free \n
390390
* DMTIMER_EMUFREE_FROZEN - Emulation mode is frozen \n
391391
*
392-
* \return None.
392+
* \return None.
393393
*
394394
**/
395395
void DMTimerEmulationModeConfigure(unsigned int baseAdd, unsigned int emuMode)
@@ -422,7 +422,7 @@ void DMTimerPwrMngmntConfigure(unsigned int baseAdd, unsigned int pwrMngMode)
422422
HWREG(baseAdd + DMTIMER_TIOCP_CFG) &= ~DMTIMER_TIOCP_CFG_IDLEMODE;
423423

424424
/* Configure power mangagement mode */
425-
HWREG(baseAdd + DMTIMER_TIOCP_CFG) |= (pwrMngMode &
425+
HWREG(baseAdd + DMTIMER_TIOCP_CFG) |= (pwrMngMode &
426426
DMTIMER_TIOCP_CFG_IDLEMODE);
427427
}
428428

@@ -433,7 +433,7 @@ void DMTimerPwrMngmntConfigure(unsigned int baseAdd, unsigned int pwrMngMode)
433433
*
434434
* \return None.
435435
*
436-
* \note This API has to be called in the Interrupt service routine after
436+
* \note This API has to be called in the Interrupt service routine after
437437
* servicing the interrupts.
438438
*
439439
**/
@@ -460,7 +460,7 @@ void DMTimerEndOfInterrupt(unsigned int baseAdd)
460460
void DMTimerIntRawStatusSet(unsigned int baseAdd, unsigned int intFlags)
461461
{
462462
/* Trigger the events in IRQSTATUS_RAW register */
463-
HWREG(baseAdd + DMTIMER_IRQSTATUS_RAW) = (intFlags &
463+
HWREG(baseAdd + DMTIMER_IRQSTATUS_RAW) = (intFlags &
464464
(DMTIMER_IRQSTATUS_RAW_MAT_IT_FLAG |
465465
DMTIMER_IRQSTATUS_RAW_OVF_IT_FLAG |
466466
DMTIMER_IRQSTATUS_RAW_TCAR_IT_FLAG));
@@ -511,9 +511,9 @@ unsigned int DMTimerIntStatusGet(unsigned int baseAdd)
511511
void DMTimerIntStatusClear(unsigned int baseAdd, unsigned int intFlags)
512512
{
513513
/* Clear the interrupt status from IRQSTATUS register */
514-
HWREG(baseAdd + DMTIMER_IRQSTATUS) = (intFlags &
515-
(DMTIMER_IRQSTATUS_TCAR_IT_FLAG |
516-
DMTIMER_IRQSTATUS_OVF_IT_FLAG |
514+
HWREG(baseAdd + DMTIMER_IRQSTATUS) = (intFlags &
515+
(DMTIMER_IRQSTATUS_TCAR_IT_FLAG |
516+
DMTIMER_IRQSTATUS_OVF_IT_FLAG |
517517
DMTIMER_IRQSTATUS_MAT_IT_FLAG));
518518
}
519519

@@ -534,9 +534,9 @@ void DMTimerIntStatusClear(unsigned int baseAdd, unsigned int intFlags)
534534
void DMTimerIntEnable(unsigned int baseAdd, unsigned int intFlags)
535535
{
536536
/* Enable the DMTimer interrupts represented by intFlags */
537-
HWREG(baseAdd + DMTIMER_IRQENABLE_SET) = (intFlags &
537+
HWREG(baseAdd + DMTIMER_IRQENABLE_SET) = (intFlags &
538538
(DMTIMER_IRQENABLE_SET_TCAR_EN_FLAG |
539-
DMTIMER_IRQENABLE_SET_OVF_EN_FLAG |
539+
DMTIMER_IRQENABLE_SET_OVF_EN_FLAG |
540540
DMTIMER_IRQENABLE_SET_MAT_EN_FLAG));
541541
}
542542

@@ -570,9 +570,9 @@ void DMTimerIntDisable(unsigned int baseAdd, unsigned int intFlags)
570570
*
571571
* \return None.
572572
*
573-
* \note When we have enabled the timer in Auto-reload mode, the value from
574-
* TLDR is reloaded into TCRR when a overflow condition occurs. But if
575-
* we want to load the contents from TLDR to TCRR before overflow
573+
* \note When we have enabled the timer in Auto-reload mode, the value from
574+
* TLDR is reloaded into TCRR when a overflow condition occurs. But if
575+
* we want to load the contents from TLDR to TCRR before overflow
576576
* occurs then call this API.
577577
**/
578578
void DMTimerTriggerSet(unsigned int baseAdd)
@@ -633,10 +633,10 @@ unsigned int DMTimerIntEnableGet(unsigned int baseAdd)
633633
**/
634634
void DMTimerWakeUpEnable(unsigned int baseAdd, unsigned int wakeUpFlags)
635635
{
636-
/* Write to the fields of IRQWAKEEN register */
637-
HWREG(baseAdd + DMTIMER_IRQWAKEEN) |= (wakeUpFlags &
638-
(DMTIMER_IRQWAKEEN_TCAR_WUP_ENA |
639-
DMTIMER_IRQWAKEEN_OVF_WUP_ENA |
636+
/* Write to the fields of IRQWAKEEN register */
637+
HWREG(baseAdd + DMTIMER_IRQWAKEEN) |= (wakeUpFlags &
638+
(DMTIMER_IRQWAKEEN_TCAR_WUP_ENA |
639+
DMTIMER_IRQWAKEEN_OVF_WUP_ENA |
640640
DMTIMER_IRQWAKEEN_MAT_WUP_ENA));
641641
}
642642

@@ -674,18 +674,18 @@ void DMTimerWakeUpDisable(unsigned int baseAdd, unsigned int wakeUpFlags)
674674
unsigned int DMTimerWritePostedStatusGet(unsigned int baseAdd)
675675
{
676676
/* Return the status of TWPS register */
677-
return (HWREG(baseAdd + DMTIMER_TWPS));
677+
return (HWREG(baseAdd + DMTIMER_TWPS));
678678
}
679679

680680
/**
681681
* \brief Enable/Disable software reset for DMTimer module.
682682
*
683683
* \param baseAdd Base Address of the DMTimer Module Register.
684684
* \param rstOption Enable/Disable reset option for DMTimer.
685-
*
685+
*
686686
* 'rstOption' can take the following values \n
687687
* DMTIMER_SFT_RESET_ENABLE - Software reset is enabled \n
688-
* DMTIMER_SFT_RESET_DISABLE - Software reset is disabled \n
688+
* DMTIMER_SFT_RESET_DISABLE - Software reset is disabled \n
689689
*
690690
* \return None.
691691
*

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