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ArcaneNibbledlech
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pbio/drv/i2c/i2c_ev3.c: Set up transaction buffers
These buffers are sized for a maximum-length transaction and are DMA-aligned. This API currently does not / will not support zero-copy operation, and user buffers will be copied to/from these DMA buffers.
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lib/pbio/drv/i2c/i2c_ev3.c

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@@ -21,6 +21,7 @@
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#include <pbio/os.h>
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#include <pbio/util.h>
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#include <pbdrv/cache.h>
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#include <pbdrv/i2c.h>
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#include "../drv/rproc/rproc.h"
@@ -38,7 +39,14 @@
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#define DBG_ERR(expr)
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#endif
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// Max 255 bytes write, 255 bytes read
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// Rounded up to a nice power of 2 and multiple of cache lines
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#define PRU_I2C_MAX_BYTES_PER_TXN 512
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static uint8_t pbdrv_i2c_buffers[PBDRV_RPROC_EV3_PRU1_NUM_I2C_BUSES][PRU_I2C_MAX_BYTES_PER_TXN] PBDRV_DMA_BUF;
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struct _pbdrv_i2c_dev_t {
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uint8_t *buffer;
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volatile bool is_busy;
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bool is_initialized;
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uint8_t pru_i2c_idx;
@@ -104,6 +112,12 @@ pbio_error_t ev3_i2c_init_process_thread(pbio_os_state_t *state, void *context)
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// Need rproc to be initialized, because it sets up the PRU INTC
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PBIO_OS_AWAIT_UNTIL(state, pbdrv_rproc_is_ready());
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// Set up the buffer pointers
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for (int i = 0; i < PBDRV_RPROC_EV3_PRU1_NUM_I2C_BUSES; i++) {
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pbdrv_i2c_dev_t *i2c = &i2c_devs[i];
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pbdrv_rproc_ev3_pru1_shared_ram.i2c[i].buffer = (uintptr_t)i2c->buffer;
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}
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// REVISIT: These event numbers get set up by the SUART library.
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// We should separate them cleanly in the future.
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IntRegister(SYS_INT_EVTOUT4, pbdrv_i2c_irq_0);
@@ -135,6 +149,7 @@ void pbdrv_i2c_init(void) {
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for (int i = 0; i < PBDRV_RPROC_EV3_PRU1_NUM_I2C_BUSES; i++) {
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pbdrv_i2c_dev_t *i2c = &i2c_devs[i];
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i2c->pru_i2c_idx = i;
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i2c->buffer = pbdrv_i2c_buffers[i];
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i2c->is_initialized = true;
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}
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