pbio/platform/ev3/start: disable and flush caches

Add a hack to disable and flush the I and D caches at in the startup
code. Previously, when we were using the U-Boot Linux loader to load
our firmware, U-Boot was doing this for us. But since we switched to
a different loader in commit c24798f ("bricks/_common/arm_none_eabi.mk:
ev3 uImage is not Linux"), it broke the display among other things.

Author: dlech

lib/pbio/platform/ev3/start.S

@@ -51,6 +51,18 @@
 @ main() function.
 @
 Entry:
+         @ HACK: The U-Boot Linux loader was doing this, but the ELF loader
+         @ does not. Adding this here until we sort out the proper way to handle
+         @ caching. But right now, it breaks the display driver and other things
+         @ if we don't do this.
+         mrc p15, #0, r0, c1, c0,#0            @ Read System Control Register
+         bic r0, r0, #0x1000                   @ Clear bit 12 to disable ICache
+         bic r0, r0, #0x0004                   @ Clear bit 2 to disable DCache
+         mcr p15, #0, r0, c1, c0, #0           @ Write back to System Control Register
+         mov r0, #0                            @ Set r0 to 0
+         mcr p15, #0, r0, c7, c7, #0           @ Invalidate all caches
+         @ END HACK
+
          MRC p15, 0, r0, c1, c0, 0 @ Load Coprocessor Register C1 to ARM Register r0
          ORR r0, r0, #0x00002000 @ Logical OR --> Set Bit 13
          MCR p15, 0, r0, c1, c0, 0 @ Restore Coprocessor Register C1 from ARM Register r0