pbio/drv/reset/reset_ev3: Implement reset via watchdog

The watchdog is the only way to reset *everything* on the AM1808.
It performs the same function as a power-on reset.

Author: ArcaneNibble

lib/pbio/drv/reset/reset_ev3.c

@@ -12,7 +12,32 @@
 
 #include "../drv/gpio/gpio_ev3.h"
 
+#include <tiam1808/hw/soc_AM1808.h>
 #include <tiam1808/hw/hw_syscfg0_AM1808.h>
+#include <tiam1808/hw/hw_types.h>
+#include <tiam1808/timer.h>
+
+#define BOOTLOADER_UPDATE_MODE_VALUE    0x5555AAAA
+
+typedef struct {
+    // 0xffff1ff0
+    uint32_t _dummy0;
+    // 0xffff1ff4
+    // Pybricks uses this flag to determine software reset vs other resets
+    uint32_t reset_reason_flag;
+    // 0xffff1ff8
+    // Have not fully investigated this, but the bootloader seems to store
+    // the result of (DDR) memory testing at 0xffff1ffa and 0xffff1ffb
+    uint32_t _bootloader_unk_ram_test;
+    // 0xffff1ffc
+    uint32_t bootloader_update_flag;
+} persistent_data_t;
+// This is defined as an extern variable so that its address can be specified
+// in the platform.ld linker script. This means that the linker script
+// contains information about *all* fixed memory locations.
+//
+// This lives at the very end of the ARM local RAM.
+extern volatile persistent_data_t ev3_persistent_data;
 
 static const pbdrv_gpio_t poweroff_pin = PBDRV_GPIO_EV3_PIN(13, 19, 16, 6, 11);
 
@@ -23,11 +48,17 @@ void pbdrv_reset_init(void) {
 void pbdrv_reset(pbdrv_reset_action_t action) {
     for (;;) {
         switch (action) {
-            case PBDRV_RESET_ACTION_RESET_IN_UPDATE_MODE:
-                // TODO
+            case PBDRV_RESET_ACTION_POWER_OFF:
+                pbdrv_reset_power_off();
                 break;
-            // TODO: implement case PBDRV_RESET_ACTION_RESET
+            case PBDRV_RESET_ACTION_RESET_IN_UPDATE_MODE:
+                ev3_persistent_data.bootloader_update_flag = BOOTLOADER_UPDATE_MODE_VALUE;
+                __attribute__((fallthrough));
             default:
+                // PBDRV_RESET_ACTION_RESET
+
+                // Poke the watchdog timer with a bad value to immediately trigger it
+                HWREG(SOC_TMR_1_REGS + TMR_WDTCR) = 0;
                 break;
         }
     }

lib/pbio/platform/ev3/platform.c

@@ -49,6 +49,7 @@
 #include <tiam1808/hw/soc_AM1808.h>
 #include <tiam1808/i2c.h>
 #include <tiam1808/psc.h>
+#include <tiam1808/timer.h>
 #include <tiam1808/uart.h>
 
 #include <umm_malloc.h>
@@ -489,6 +490,12 @@ void ev3_panic_handler(int except_type, ev3_panic_ctx *except_data) {
     panic_putu32(except_data->spsr);
 
     panic_puts("\r\nSystem will now reboot...\r\n");
+
+    // Poke the watchdog timer with a bad value to immediately trigger it
+    // if it has already been configured. If it has *not* been configured,
+    // that means we are crashing in early boot, and we let the jump back
+    // to the reset vector take care of rebooting the system.
+    HWREG(SOC_TMR_1_REGS + TMR_WDTCR) = 0;
 }
 
 /**

lib/pbio/platform/ev3/platform.ld

@@ -9,13 +9,19 @@ MEMORY
     SRAM_PRU1  (rw)  : ORIGIN = 0x80010000, LENGTH = 64K
     DDR_unused (rwx) : ORIGIN = 0xC0000000, LENGTH = 0x8000
     DDR        (rwx) : ORIGIN = 0xC0008000, LENGTH = (64M - 0x8000)
-    ARM_LRAM   (rwx) : ORIGIN = 0xFFFF0000, LENGTH = 8K
+    ARM_LRAM   (rwx) : ORIGIN = 0xFFFF0000, LENGTH = (8K - 16)
 }
 
 _minimal_stack_size = 4M;
 pbdrv_stack_end = ORIGIN(DDR) + LENGTH(DDR) - 4;
 /* Extra heap for large allocations (images, etc). */
 pb_umm_heap_size = 2M;
+/*
+We declare this in this style rather than creating a section.
+If we do create a section, the loader (U-boot) will always clear it.
+This defeats what we are trying to do to determine reset causes.
+*/
+ev3_persistent_data = ORIGIN(ARM_LRAM) + LENGTH(ARM_LRAM);
 
 SECTIONS
 {