pbio/drv/rproc/rproc_ev3: Add I2C interface for PRU1

This defines the communications structure and sets up the resources
for PRU1's software I2C controller.

Author: ArcaneNibble

lib/pbio/drv/rproc/rproc_ev3.c

@@ -45,6 +45,12 @@ void pbdrv_rproc_init(void) {
     TimerPeriodSet(SOC_TMR_0_REGS, TMR_TIMER34, 256 * 256 - 1);
     TimerEnable(SOC_TMR_0_REGS, TMR_TIMER34, TMR_ENABLE_CONT);
 
+    // Enable Timer2 "12" half for 20 kHz = 2 * 10 kHz
+    // This is used by the PRU to time I2C bits
+    TimerConfigure(SOC_TMR_2_REGS, TMR_CFG_32BIT_UNCH_CLK_BOTH_INT);
+    TimerPeriodSet(SOC_TMR_2_REGS, TMR_TIMER12, SOC_SYSCLK_2_FREQ / (2 * PBDRV_RPROC_EV3_PRU1_I2C_CLK_SPEED_HZ) - 1);
+    TimerEnable(SOC_TMR_2_REGS, TMR_TIMER12, TMR_ENABLE_CONT);
+
     // Clear shared command memory
     memset((void *)&pbdrv_rproc_ev3_pru1_shared_ram, 0, sizeof(pbdrv_rproc_ev3_pru1_shared_ram));
 

lib/pbio/drv/rproc/rproc_ev3_pru1.h

@@ -11,6 +11,45 @@
 // between the two codebases and must be kept in sync.
 
 #define PBDRV_RPROC_EV3_PRU1_NUM_PWM_CHANNELS   4
+#define PBDRV_RPROC_EV3_PRU1_NUM_I2C_CHANNELS   4
+
+#define PBDRV_RPROC_EV3_PRU1_I2C_CLK_SPEED_HZ   10000
+
+// I2C command bits
+// Start an I2C transaction
+#define PBDRV_RPROC_EV3_PRU1_I2C_CMD_START          0x01
+// Generate a stop, clock pulse, and start instead of a repeated start
+// Used for the NXT ultrasonic sensor.
+#define PBDRV_RPROC_EV3_PRU1_I2C_CMD_NXT_QUIRK      0x02
+
+// I2C status bits
+// Indicates transaction is complete
+#define PBDRV_RPROC_EV3_PRU1_I2C_STAT_DONE          0x80
+// Mask for the status code
+#define PBDRV_RPROC_EV3_PRU1_I2C_STAT_MASK          0x7f
+
+// I2C transaction status codes
+enum {
+    PBDRV_RPROC_EV3_PRU1_I2C_STAT_OK,
+    PBDRV_RPROC_EV3_PRU1_I2C_STAT_TIMEOUT,
+    PBDRV_RPROC_EV3_PRU1_I2C_STAT_NAK,
+};
+
+#define PBDRV_RPROC_EV3_PRU1_I2C_PACK_FLAGS(daddr, rlen, wlen, flags)   \
+    ((((daddr) & 0xff) << 24) |                                         \
+    (((rlen) & 0xff) << 16) |                                           \
+    (((wlen) & 0xff) << 8) |                                            \
+    ((flags) & 0xff))
+
+typedef struct {
+    // bit[7:0]     status and flags
+    // bit[15:8]    write length
+    // bit[23:16]   read length
+    // bit[31:24]   device address (unshifted)
+    uint32_t flags;
+    // Physical address of a transaction buffer
+    uint8_t *buffer;
+} pbdrv_rproc_ev3_pru1_i2c_command_t;
 
 typedef struct {
     union {
@@ -25,6 +64,7 @@ typedef struct {
     // of them and route ARM accesses through the PRU.
     uint32_t gpio_bank_01_dir_set;
     uint32_t gpio_bank_01_dir_clr;
+    pbdrv_rproc_ev3_pru1_i2c_command_t i2c[PBDRV_RPROC_EV3_PRU1_NUM_I2C_CHANNELS];
 } pbdrv_rproc_ev3_pru1_shared_ram_t;
 
 #endif // _INTERNAL_PBDRV_RPROC_EV3_PRU1_H_