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21 | 21 | #include <pbio/os.h> |
22 | 22 | #include <pbio/util.h> |
23 | 23 |
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| 24 | +#include <pbdrv/cache.h> |
24 | 25 | #include <pbdrv/i2c.h> |
25 | 26 |
|
26 | 27 | #include "../drv/rproc/rproc.h" |
|
38 | 39 | #define DBG_ERR(expr) |
39 | 40 | #endif |
40 | 41 |
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| 42 | +// Max 255 bytes write, 255 bytes read |
| 43 | +// Rounded up to a nice power of 2 and multiple of cache lines |
| 44 | +#define PRU_I2C_MAX_BYTES_PER_TXN 512 |
| 45 | + |
| 46 | +static uint8_t pbdrv_i2c_buffers[PBDRV_CONFIG_I2C_EV3_NUM_DEV][PRU_I2C_MAX_BYTES_PER_TXN] PBDRV_DMA_BUF; |
| 47 | + |
41 | 48 | struct _pbdrv_i2c_dev_t { |
| 49 | + uint8_t *buffer; |
42 | 50 | volatile bool is_busy; |
43 | 51 | bool is_initialized; |
44 | 52 | uint8_t pru_i2c_idx; |
@@ -105,6 +113,12 @@ pbio_error_t ev3_i2c_init_process_thread(pbio_os_state_t *state, void *context) |
105 | 113 | // Need rproc to be initialized, because it sets up the PRU INTC |
106 | 114 | PBIO_OS_AWAIT_UNTIL(state, pbdrv_rproc_is_ready()); |
107 | 115 |
|
| 116 | + // Set up the buffer pointers |
| 117 | + for (int i = 0; i < PBDRV_CONFIG_I2C_EV3_NUM_DEV; i++) { |
| 118 | + pbdrv_i2c_dev_t *i2c = &i2c_devs[i]; |
| 119 | + pbdrv_rproc_ev3_pru1_shared_ram.i2c[i].buffer = (uintptr_t)i2c->buffer; |
| 120 | + } |
| 121 | + |
108 | 122 | // REVISIT: These event numbers get set up by the SUART library. |
109 | 123 | // We should separate them cleanly in the future. |
110 | 124 | IntRegister(SYS_INT_EVTOUT4, pbdrv_i2c_irq_0); |
@@ -136,6 +150,7 @@ void pbdrv_i2c_init(void) { |
136 | 150 | for (int i = 0; i < PBDRV_CONFIG_I2C_EV3_NUM_DEV; i++) { |
137 | 151 | pbdrv_i2c_dev_t *i2c = &i2c_devs[i]; |
138 | 152 | i2c->pru_i2c_idx = i; |
| 153 | + i2c->buffer = pbdrv_i2c_buffers[i]; |
139 | 154 | i2c->is_initialized = true; |
140 | 155 | } |
141 | 156 |
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