@@ -398,15 +398,98 @@ unsigned int EDMAVersionGet(void) {
398398 return 1 ;
399399}
400400
401- void ev3_panic_handler (int except_type , void * except_data ) {
401+ static void panic_puts (const char * c ) {
402+ while (* c ) {
403+ UARTCharPut (SOC_UART_1_REGS , * (c ++ ));
404+ }
405+ }
406+ static void panic_putu8 (uint8_t x ) {
407+ const char * hex = "0123456789ABCDEF" ;
408+ UARTCharPut (SOC_UART_1_REGS , hex [x >> 4 ]);
409+ UARTCharPut (SOC_UART_1_REGS , hex [x & 0xf ]);
410+ }
411+ static void panic_putu32 (uint32_t x ) {
412+ panic_putu8 (x >> 24 );
413+ panic_putu8 (x >> 16 );
414+ panic_putu8 (x >> 8 );
415+ panic_putu8 (x );
416+ }
417+ // This needs to be kept in sync with exceptionhandler.S
418+ static const char * const panic_types [] = {
419+ "UNKNOWN" ,
420+ "Undefined Instruction" ,
421+ "Prefetch Abort" ,
422+ "Data Abort" ,
423+ };
424+ typedef struct {
425+ uint32_t r13 ;
426+ uint32_t r14 ;
427+ uint32_t spsr ;
428+ uint32_t r0 ;
429+ uint32_t r1 ;
430+ uint32_t r2 ;
431+ uint32_t r3 ;
432+ uint32_t r4 ;
433+ uint32_t r5 ;
434+ uint32_t r6 ;
435+ uint32_t r7 ;
436+ uint32_t r8 ;
437+ uint32_t r9 ;
438+ uint32_t r10 ;
439+ uint32_t r11 ;
440+ uint32_t r12 ;
441+ uint32_t exc_lr ;
442+ } ev3_panic_ctx ;
443+
444+ void ev3_panic_handler (int except_type , ev3_panic_ctx * except_data ) {
402445 // Regardless of what's going on, configure the UART1 for a debug console
403446 PSCModuleControl (SOC_PSC_1_REGS , HW_PSC_UART1 , PSC_POWERDOMAIN_ALWAYS_ON , PSC_MDCTL_NEXT_ENABLE );
404447 UARTConfigSetExpClk (SOC_UART_1_REGS , SOC_UART_1_MODULE_FREQ , 115200 , UART_WORDL_8BITS , UART_OVER_SAMP_RATE_13 );
405448 UARTFIFOEnable (SOC_UART_1_REGS );
406449
407- // TODO: Implement panic handler
408- UARTCharPut (SOC_UART_1_REGS , 'H' );
409- UARTCharPut (SOC_UART_1_REGS , 'i' );
450+ panic_puts ("********************************************************************************\r\n" );
451+ panic_puts ("* Pybricks on EV3 Panic *\r\n" );
452+ panic_puts ("********************************************************************************\r\n" );
453+
454+ panic_puts ("Exception type: " );
455+ panic_puts (panic_types [except_type ]);
456+
457+ panic_puts ("\r\nR0: 0x" );
458+ panic_putu32 (except_data -> r0 );
459+ panic_puts ("\r\nR1: 0x" );
460+ panic_putu32 (except_data -> r1 );
461+ panic_puts ("\r\nR2: 0x" );
462+ panic_putu32 (except_data -> r2 );
463+ panic_puts ("\r\nR3: 0x" );
464+ panic_putu32 (except_data -> r3 );
465+ panic_puts ("\r\nR4: 0x" );
466+ panic_putu32 (except_data -> r4 );
467+ panic_puts ("\r\nR5: 0x" );
468+ panic_putu32 (except_data -> r5 );
469+ panic_puts ("\r\nR6: 0x" );
470+ panic_putu32 (except_data -> r6 );
471+ panic_puts ("\r\nR7: 0x" );
472+ panic_putu32 (except_data -> r7 );
473+ panic_puts ("\r\nR8: 0x" );
474+ panic_putu32 (except_data -> r8 );
475+ panic_puts ("\r\nR9: 0x" );
476+ panic_putu32 (except_data -> r9 );
477+ panic_puts ("\r\nR10: 0x" );
478+ panic_putu32 (except_data -> r10 );
479+ panic_puts ("\r\nR11: 0x" );
480+ panic_putu32 (except_data -> r11 );
481+ panic_puts ("\r\nR12: 0x" );
482+ panic_putu32 (except_data -> r12 );
483+ panic_puts ("\r\nR13: 0x" );
484+ panic_putu32 (except_data -> r13 );
485+ panic_puts ("\r\nR14: 0x" );
486+ panic_putu32 (except_data -> r14 );
487+ panic_puts ("\r\nR15: 0x" );
488+ panic_putu32 (except_data -> exc_lr );
489+ panic_puts ("\r\nSPSR: 0x" );
490+ panic_putu32 (except_data -> spsr );
491+
492+ panic_puts ("\r\nSystem will now reboot...\r\n" );
410493}
411494
412495/**
0 commit comments