Skip to content

Commit 36887f4

Browse files
committed
fix adc+flash; finally works
1 parent 678268d commit 36887f4

File tree

1 file changed

+8
-1
lines changed

1 file changed

+8
-1
lines changed

lib/pbio/drv/block_device/block_device_ev3.c

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -677,7 +677,14 @@ void pbdrv_block_device_init(void) {
677677

678678
// SPI module data formats
679679
SPIClkConfigure(SOC_SPI_0_REGS, SOC_SPI_0_MODULE_FREQ, SPI_CLK_SPEED_FLASH, SPI_DATA_FORMAT0);
680-
SPIConfigClkFormat(SOC_SPI_0_REGS, SPI_CLK_POL_HIGH | SPI_CLK_INPHASE, SPI_DATA_FORMAT0);
680+
// For reasons which have not yet been fully investigated, attempting to switch between
681+
// SPI_CLK_POL_HIGH and SPI_CLK_POL_LOW seems to not work correctly (possibly causing a glitch?)
682+
// In general, partial writes to SPI_SPIDAT1, such as in spi0_setup_for_flash, seem to behave
683+
// unintuitively.
684+
//
685+
// Since multiple options work for SPI flash, set this CPOL/CPHA to match what the ADC needs
686+
// (see comment in adc_ev3.c).
687+
SPIConfigClkFormat(SOC_SPI_0_REGS, SPI_CLK_POL_LOW | SPI_CLK_OUTOFPHASE, SPI_DATA_FORMAT0);
681688
SPIShiftMsbFirst(SOC_SPI_0_REGS, SPI_DATA_FORMAT0);
682689
SPICharLengthSet(SOC_SPI_0_REGS, 8, SPI_DATA_FORMAT0);
683690
#if PBDRV_CONFIG_ADC_EV3

0 commit comments

Comments
 (0)