pbio/drv/adc/adc_ev3: Initialize SPI data format.

Author: ArcaneNibble

lib/pbio/drv/adc/adc_ev3.c

@@ -32,6 +32,20 @@
 
 #define PBDRV_CONFIG_ADC_EV3_NUM_DELAY_SAMPLES (2)
 
+/**
+ * Constants.
+ */
+enum {
+    // The maximum ADC clock speed according to the datasheet is 20 MHz.
+    // However, because the SPI peripheral does not have a fractional clock generator,
+    // the closest achievable in-spec speed is a division factor of 8.
+    //
+    // 150 MHz / 8 = 18.75 MHz actual
+    SPI_CLK_SPEED_ADC = 20000000,
+
+    ADC_SAMPLE_PERIOD = 10,
+};
+
 static volatile uint16_t channel_data[PBDRV_CONFIG_ADC_EV3_ADC_NUM_CHANNELS + PBDRV_CONFIG_ADC_EV3_NUM_DELAY_SAMPLES];
 
 static int adc_soon;
@@ -98,6 +112,15 @@ void pbdrv_adc_update_soon(void) {
     pbio_os_request_poll();
 }
 
+void pbdrv_adc_ev3_configure_data_format() {
+    SPIClkConfigure(SOC_SPI_0_REGS, SOC_SYSCLK_2_FREQ, SPI_CLK_SPEED_ADC, SPI_DATA_FORMAT1);
+    // NOTE: Cannot be CPOL=1 CPHA=1 like SPI flash
+    // The ADC seems to use the last falling edge to trigger conversions (see Figure 1 in the datasheet).
+    SPIConfigClkFormat(SOC_SPI_0_REGS, SPI_CLK_POL_LOW | SPI_CLK_OUTOFPHASE, SPI_DATA_FORMAT1);
+    SPIShiftMsbFirst(SOC_SPI_0_REGS, SPI_DATA_FORMAT1);
+    SPICharLengthSet(SOC_SPI_0_REGS, 16, SPI_DATA_FORMAT1);
+}
+
 void pbdrv_adc_ev3_shut_down_hack() {
     shut_down_hack = 1;
     pbio_os_request_poll();

lib/pbio/drv/adc/adc_ev3.h

@@ -4,6 +4,8 @@
 #ifndef _INTERNAL_PBDRV_ADC_EV3_H_
 #define _INTERNAL_PBDRV_ADC_EV3_H_
 
+void pbdrv_adc_ev3_configure_data_format();
+
 void pbdrv_adc_ev3_shut_down_hack();
 int pbdrv_adc_ev3_is_shut_down_hack();
 

lib/pbio/drv/block_device/block_device_ev3.c

@@ -689,7 +689,9 @@ void pbdrv_block_device_init(void) {
     SPIConfigClkFormat(SOC_SPI_0_REGS, SPI_CLK_POL_LOW | SPI_CLK_OUTOFPHASE, SPI_DATA_FORMAT0);
     SPIShiftMsbFirst(SOC_SPI_0_REGS, SPI_DATA_FORMAT0);
     SPICharLengthSet(SOC_SPI_0_REGS, 8, SPI_DATA_FORMAT0);
-    // TODO: Initialize ADC data format
+    #if PBDRV_CONFIG_ADC_EV3
+    pbdrv_adc_ev3_configure_data_format();
+    #endif
 
     // Configure the GPIO pins.
     pbdrv_gpio_alt(&pin_spi0_mosi, SYSCFG_PINMUX3_PINMUX3_15_12_SPI0_SIMO0);