pbio/drv/adc/adc_ev3: Replace with new stub driver

This stub driver uses pbio rather than Contiki, and it is ready to be
integrated with the SPI flash driver (including waiting for the SPI bus to be available),
but the actual logic for talking to the ADC chip has not been implemented yet.

Author: ArcaneNibble

lib/pbio/drv/adc/adc_ev3.c

@@ -9,13 +9,12 @@
 #include <stdint.h>
 #include <string.h>
 
-#include <contiki.h>
-
 #include <pbdrv/adc.h>
 #include <pbdrv/clock.h>
 #include <pbdrv/gpio.h>
 
 #include <pbio/error.h>
+#include <pbio/os.h>
 #include <pbio/util.h>
 
 #include <tiam1808/spi.h>
@@ -25,15 +24,20 @@
 #include <tiam1808/hw/hw_syscfg0_AM1808.h>
 #include <tiam1808/armv5/am1808/interrupt.h>
 
+#include "adc_ev3.h"
+#include "../drv/block_device/block_device_ev3.h"
 #include "../drv/gpio/gpio_ev3.h"
 
-PROCESS(pbdrv_adc_process, "ADC");
+#include "../sys/storage.h"
+
+#define PBDRV_CONFIG_ADC_EV3_NUM_DELAY_SAMPLES (2)
 
-#define PBDRV_CONFIG_ADC_EV3_NUM_DELAY_SAMPLES (4)
+static volatile uint16_t channel_data[PBDRV_CONFIG_ADC_EV3_ADC_NUM_CHANNELS + PBDRV_CONFIG_ADC_EV3_NUM_DELAY_SAMPLES];
 
-static volatile uint16_t channel_data[PBDRV_CONFIG_ADC_EV3_ADC_NUM_CHANNELS + PBDRV_CONFIG_ADC_EV3_NUM_DELAY_SAMPLES] = {0};
-static volatile uint8_t channel_data_index = 0;
-static volatile bool adc_busy = false;
+static int adc_soon;
+// Used to block ADC from interfering with flash upon shutdown
+static int shut_down_hack = 0;
+static int shut_down_hack_done = 0;
 
 static pbdrv_adc_callback_t pbdrv_adc_callbacks[1];
 static uint32_t pbdrv_adc_callback_count = 0;
@@ -48,127 +52,58 @@ pbio_error_t pbdrv_adc_get_ch(uint8_t ch, uint16_t *value) {
     if (ch >= PBDRV_CONFIG_ADC_EV3_ADC_NUM_CHANNELS) {
         return PBIO_ERROR_INVALID_ARG;
     }
-    // Values for the requested channel are received several samples later.
-    // The data only appears 12-bit but the last 2 bits are always zero.
-    *value = (channel_data[ch + PBDRV_CONFIG_ADC_EV3_NUM_DELAY_SAMPLES] - 4096 * ch) >> 2;
+    // XXX We probably need to figure out how atomicity works between the DMA and the CPU.
+    // For now, read the value twice and assume it's good (not torn) if the values are the same.
+    uint16_t a, b;
+    do {
+        // Values for the requested channel are received several samples later.
+        a = channel_data[ch + PBDRV_CONFIG_ADC_EV3_NUM_DELAY_SAMPLES];
+        b = channel_data[ch + PBDRV_CONFIG_ADC_EV3_NUM_DELAY_SAMPLES];
+    } while (a != b);
+
+    // Mask the data to 10 bits
+    *value = (a >> 2) & 0x3ff;
     return PBIO_SUCCESS;
 }
 
-static void spi0_isr(void) {
-    uint32_t intCode = 0;
-    IntSystemStatusClear(SYS_INT_SPINT0);
-
-    while ((intCode = SPIInterruptVectorGet(SOC_SPI_0_REGS))) {
-        if (intCode != SPI_TX_BUF_EMPTY) {
-            continue;
-        }
-        // Payload encoding comes from the original EV3 sources, but we
-        // use the hardware SPI peripheral instead of bit-banging.
-        uint16_t payload = 0x1840 | (((channel_data_index % PBDRV_CONFIG_ADC_EV3_ADC_NUM_CHANNELS) & 0x000F) << 7);
-        HWREG(SOC_SPI_0_REGS + SPI_SPIDAT0) = payload;
-        channel_data[channel_data_index] = SPIDataReceive(SOC_SPI_0_REGS);
-
-        if (++channel_data_index == PBIO_ARRAY_SIZE(channel_data)) {
-            SPIIntDisable(SOC_SPI_0_REGS, SPI_TRANSMIT_INT);
-            adc_busy = false;
-            process_poll(&pbdrv_adc_process);
-        }
-    }
-}
+static pbio_os_process_t pbdrv_adc_ev3_process;
 
-static void pbdrv_adc_exit(void) {
-    SPIIntDisable(SOC_SPI_0_REGS, SPI_RECV_INT | SPI_TRANSMIT_INT);
-}
+pbio_error_t pbdrv_adc_ev3_process_thread(pbio_os_state_t *state, void *context) {
+    static pbio_os_timer_t timer;
 
-// ADC / Flash SPI0 data MOSI
-static const pbdrv_gpio_t pin_spi0_mosi = PBDRV_GPIO_EV3_PIN(3, 15, 12, 8, 5);
+    (void)timer;
 
-// ADC / Flash SPI0 data MISO
-static const pbdrv_gpio_t pin_spi0_miso = PBDRV_GPIO_EV3_PIN(3, 11, 8, 8, 6);
+    PBIO_OS_ASYNC_BEGIN(state);
 
-// LCD SPI0 Clock
-static const pbdrv_gpio_t pin_spi0_clk = PBDRV_GPIO_EV3_PIN(3, 3, 0, 1, 8);
+    // HACK: This waits until storage is completely done with SPI flash before we start
+    PBIO_OS_AWAIT_UNTIL(state, pbsys_storage_settings_get_settings());
 
-// ADC / Flash SPI0 chip select (active low).
-static const pbdrv_gpio_t pin_spi0_cs = PBDRV_GPIO_EV3_PIN(3, 27, 24, 8, 2);
+    // Once SPI flash init is finished, there is nothing further for us to do.
+    // We are ready to start sampling.
 
-// ADCACK PIN
-static const pbdrv_gpio_t pin_adc_ack = PBDRV_GPIO_EV3_PIN(19, 19, 16, 6, 2);
+    // TODO: Actually start sampling
 
-// ADCBATEN
-static const pbdrv_gpio_t pin_adc_bat_en = PBDRV_GPIO_EV3_PIN(1, 7, 4, 0, 6);
+    PBIO_OS_ASYNC_END(PBIO_SUCCESS);
+}
 
 void pbdrv_adc_init(void) {
+    // Immediately go into async mode so that we can wait for the SPI flash driver.
+    // We *don't* want to block the initial init phase, or else things will deadlock.
 
-    // Configure the GPIO pins.
-    pbdrv_gpio_alt(&pin_spi0_mosi, SYSCFG_PINMUX3_PINMUX3_15_12_SPI0_SIMO0);
-    pbdrv_gpio_alt(&pin_spi0_miso, SYSCFG_PINMUX3_PINMUX3_11_8_SPI0_SOMI0);
-    pbdrv_gpio_alt(&pin_spi0_clk, SYSCFG_PINMUX3_PINMUX3_3_0_SPI0_CLK);
-    pbdrv_gpio_alt(&pin_spi0_cs, SYSCFG_PINMUX3_PINMUX3_27_24_NSPI0_SCS3);
-
-    pbdrv_gpio_input(&pin_adc_ack);
-
-    pbdrv_gpio_out_high(&pin_adc_bat_en);
-
-    // Waking up the SPI1 instance.
-    PSCModuleControl(SOC_PSC_1_REGS, HW_PSC_SPI0, PSC_POWERDOMAIN_ALWAYS_ON, PSC_MDCTL_NEXT_ENABLE);
-
-    // Register the ISR in the Interrupt Vector Table.
-    IntRegister(SYS_INT_SPINT0, spi0_isr);
-    IntChannelSet(SYS_INT_SPINT0, 2);
-    IntSystemEnable(SYS_INT_SPINT0);
-
-    // Reset.
-    SPIReset(SOC_SPI_0_REGS);
-    SPIOutOfReset(SOC_SPI_0_REGS);
-
-    // Mode.
-    uint32_t spipc0 = SPI_SPIPC0_SOMIFUN | SPI_SPIPC0_SIMOFUN | SPI_SPIPC0_CLKFUN | SPI_SPIPC0_SCS0FUN3;
-    SPIModeConfigure(SOC_SPI_0_REGS, SPI_MASTER_MODE);
-    SPIPinControl(SOC_SPI_0_REGS, 0, 0, (unsigned int *)&spipc0);
-
-    // Config.
-    SPIClkConfigure(SOC_SPI_0_REGS, SOC_SYSCLK_2_FREQ, 2000000, SPI_DATA_FORMAT0);
-    SPIConfigClkFormat(SOC_SPI_0_REGS, SPI_CLK_OUTOFPHASE | 0x00000010, SPI_DATA_FORMAT0);
-    SPIDelayConfigure(SOC_SPI_0_REGS, 10, 10, 10, 10);
-    SPIIntLevelSet(SOC_SPI_0_REGS, SPI_RECV_INTLVL | SPI_TRANSMIT_INTLVL);
-    SPIDefaultCSSet(SOC_SPI_0_REGS, 8);
-
-    // Enable and loop around all channels.
-    SPIEnable(SOC_SPI_0_REGS);
-
-    process_start(&pbdrv_adc_process);
+    pbio_os_process_start(&pbdrv_adc_ev3_process, pbdrv_adc_ev3_process_thread, NULL);
 }
 
 void pbdrv_adc_update_soon(void) {
-    process_poll(&pbdrv_adc_process);
+    adc_soon = 1;
+    pbio_os_request_poll();
 }
 
-PROCESS_THREAD(pbdrv_adc_process, ev, data) {
-    PROCESS_EXITHANDLER(pbdrv_adc_exit());
-
-    static struct etimer etimer;
-
-    PROCESS_BEGIN();
-
-    etimer_set(&etimer, 10);
-    for (;;) {
-        PROCESS_WAIT_EVENT_UNTIL((ev == PROCESS_EVENT_TIMER && etimer_expired(&etimer)) || ev == PROCESS_EVENT_POLL);
-
-        channel_data_index = 0;
-        adc_busy = true;
-        SPIEnable(SOC_SPI_0_REGS);
-        SPIIntEnable(SOC_SPI_0_REGS, SPI_TRANSMIT_INT);
-        PROCESS_WAIT_EVENT_UNTIL(ev == PROCESS_EVENT_POLL && !adc_busy);
-
-        for (uint32_t i = 0; i < pbdrv_adc_callback_count; i++) {
-            pbdrv_adc_callbacks[i]();
-        }
-
-        etimer_reset(&etimer);
-    }
-
-    PROCESS_END();
+void pbdrv_adc_ev3_shut_down_hack() {
+    shut_down_hack = 1;
+    pbio_os_request_poll();
+}
+int pbdrv_adc_ev3_is_shut_down_hack() {
+    return shut_down_hack_done;
 }
 
 #endif // PBDRV_CONFIG_ADC_EV3

lib/pbio/drv/adc/adc_ev3.h

@@ -0,0 +1,10 @@
+// SPDX-License-Identifier: MIT
+// Copyright (c) 2025 The Pybricks Authors
+
+#ifndef _INTERNAL_PBDRV_ADC_EV3_H_
+#define _INTERNAL_PBDRV_ADC_EV3_H_
+
+void pbdrv_adc_ev3_shut_down_hack();
+int pbdrv_adc_ev3_is_shut_down_hack();
+
+#endif // _INTERNAL_PBDRV_ADC_EV3_H_

lib/pbio/drv/block_device/block_device_ev3.c

@@ -27,6 +27,7 @@
 
 #include "block_device_ev3.h"
 #include "../drv/gpio/gpio_ev3.h"
+#include "../drv/adc/adc_ev3.h"
 
 #include <pbio/error.h>
 #include <pbio/int_math.h>
@@ -581,6 +582,13 @@ pbio_error_t pbdrv_block_device_store(pbio_os_state_t *state, uint8_t *buffer, u
         return PBIO_ERROR_INVALID_ARG;
     }
 
+#if PBDRV_CONFIG_ADC_EV3
+    // HACK
+    // We only store on shutdown. Block ADC.
+    pbdrv_adc_ev3_shut_down_hack();
+    PBIO_OS_AWAIT_UNTIL(state, pbdrv_adc_ev3_is_shut_down_hack());
+#endif
+
     // Erase sector by sector.
     for (offset = 0; offset < size; offset += FLASH_SIZE_ERASE) {
         // Enable writing

lib/pbio/platform/ev3/pbdrvconfig.h

@@ -3,8 +3,8 @@
 
 // platform-specific configuration for LEGO MINDSTORMS EV3
 
-#define PBDRV_CONFIG_ADC                            (0)
-#define PBDRV_CONFIG_ADC_EV3                        (0)
+#define PBDRV_CONFIG_ADC                            (1)
+#define PBDRV_CONFIG_ADC_EV3                        (1)
 #define PBDRV_CONFIG_ADC_EV3_ADC_NUM_CHANNELS       (16)
 
 #define PBDRV_CONFIG_CLOCK                          (1)