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pbio/drv/clock/clock_ev3: Stop depending on boot process to set up prescaler
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lib/pbio/drv/clock/clock_ev3.c

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -21,16 +21,15 @@
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#include <tiam1808/hw/soc_AM1808.h>
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#include <tiam1808/timer.h>
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24-
/**
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* The compare value to set for the 16 least significant bits of the hardware timer
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*
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* This is the value which causes the interrupt to be triggered every millisecond.
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*/
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#define TMR_PERIOD_LSB32 0x05CC
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/*
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* The compare value to set for the 16 most significant bits of the hardware timer
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*/
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#define TMR_PERIOD_MSB32 0x0
24+
// The input to the Timer0 module is PLL0_AUXCLK. This will always run at 24 MHz on the EV3,
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// regardless of what the CPU speed is set to. We configure the timer to generate interrupts
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// every millisecond, and we configure the timer to reset to 0 when it reaches a count value
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// corresponding to one millisecond of time. Finer timing resolution can be obtained by
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// combining the software-managed millisecond counter with the timer value.
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//
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// The system tick uses the "12" half of the timer, and the PRU1 (TODO) uses the "34" half.
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static const uint32_t auxclk_freq_hz = SOC_ASYNC_2_FREQ;
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static const uint32_t timer_ms_period = (auxclk_freq_hz / 1000) - 1;
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/**
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* The current tick in milliseconds
@@ -80,7 +79,8 @@ void pbdrv_clock_init(void) {
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/* Set up the timer */
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TimerConfigure(SOC_TMR_0_REGS, TMR_CFG_32BIT_UNCH_CLK_BOTH_INT);
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TimerPeriodSet(SOC_TMR_0_REGS, TMR_TIMER34, TMR_PERIOD_LSB32);
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TimerPreScalarCount34Set(SOC_TMR_0_REGS, 0);
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TimerPeriodSet(SOC_TMR_0_REGS, TMR_TIMER34, timer_ms_period);
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/* Register the Timer ISR */
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IntRegister(SYS_INT_TINT34_0, systick_isr_C);

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