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Reset the target, optionally with halt and/or specifying the reset type. The reset type must be one of ‘default’, ‘hw’, ‘sw’, ‘hardware’, ‘software’, ‘system’, ‘core’, ‘emulated’, ‘sw_system’, ‘sw_core’, ‘sw_sysresetreq’, ‘sw_vectreset’, ‘sw_emulated’, ‘sysresetreq’, or ‘vectreset’.</p>
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Reset the target, optionally with halt and/or specifying the reset type. The reset type must be one of ‘default’, ‘hardware’, ‘system’, ‘core’, ‘n_srst’, ‘sysresetreq’, ‘vectreset’ or ‘emulated’.</p>
Copy file name to clipboardExpand all lines: docs/multicore_debug.html
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<p>By default, the primary core is core number 0. For Arm CoreSight based devices, this will be the core with the lowest associated access port address. Use the <codeclass="highlighter-rouge">primary_core</code> session option to change the primary core.</p>
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<p>When performing multicore debug where multiple gdb instances are connected simultaneously, it is important to set the <codeclass="highlighter-rouge">enable_multicore_debug</code> session option to true. This changes secondary cores to have their default reset type set to core-only reset (<codeclass="highlighter-rouge">sw_core</code>). This prevents competing reset requests from the multiple gdb instances causing havoc. On v7-M architecture cores, VECTRESET is used. However, VECTRESET is not supported on other core architecture, so non-v7-M architectures will fall back to an emulated core reset.</p>
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<p>When performing multicore debug where multiple gdb instances are connected simultaneously, it is important to set the <codeclass="highlighter-rouge">enable_multicore_debug</code> session option to true. This changes secondary cores to have their default reset type set to core-only reset. This prevents competing reset requests from the multiple gdb instances causing havoc.</p>
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<p>To debug a multicore device, run <codeclass="highlighter-rouge">pyocd gdbserver</code> as usual. This will connect to the device, detect
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the cores, and create the gdb server instances on separate ports. Next, start up two gdb instances
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depend on whether the secondary core’s code is running out of flash or RAM.</p>
<p>The <codeclass="highlighter-rouge">reset_type</code> parameter on the <codeclass="highlighter-rouge">Target</code> reset methods can be set to one of the <codeclass="highlighter-rouge">Target.ResetType</code>
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enums:</p>
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<ul>
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<li><codeclass="highlighter-rouge">ResetType.HW</code>: Hardware reset using the nRESET signal.</li>
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<li><codeclass="highlighter-rouge">ResetType.SW</code>: Uses the core’s default software reset method.</li>
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<li><codeclass="highlighter-rouge">ResetType.SW_SYSRESETREQ</code>: Software reset using SYSRESETREQ, which usually resets the entire system
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<li><codeclass="highlighter-rouge">ResetType.DEFAULT</code>: Uses the core’s default reset method. For pack targets <codeclass="highlighter-rouge">defaultResetSequence</code> is used.
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For internal targets, the default is mapped to <codeclass="highlighter-rouge">ResetType.SYSTEM</code>, unless <codeclass="highlighter-rouge">default_reset_type</code>
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property is explicitly set.</li>
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<li><codeclass="highlighter-rouge">ResetType.HARDWARE</code>: Execute <codeclass="highlighter-rouge">ResetHardware</code> debug sequence for pack targets, if the sequence doesn’t exist,
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hardware reset using the nSRST signal is used. The same mapping applies for internal targets.</li>
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<li><codeclass="highlighter-rouge">ResetType.SYSTEM</code>: Execute <codeclass="highlighter-rouge">ResetSystem</code> debug sequence for pack targets, if the sequence doesn’t exist,
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software reset using SYSRESETREQ is used. The same mapping applies for internal targets.</li>
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<li><codeclass="highlighter-rouge">ResetType.CORE</code>: Execute <codeclass="highlighter-rouge">ResetProcessor</code> debug sequence for pack targets, if the sequence doesn’t exist,
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software reset using VECTRESET is used. The same mapping applies for internal targets.</li>
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<li><codeclass="highlighter-rouge">ResetType.NSRST</code>: Hardware reset using the nSRST signal.</li>
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<li><codeclass="highlighter-rouge">ResetType.SYSRESETREQ</code>: Software reset using SYSRESETREQ, which usually resets the entire system
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on most MCUs.</li>
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<li><codeclass="highlighter-rouge">ResetType.SW_VECTRESET</code>: Software reset using VECTRESET, only available on v7-M targets. This
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resets only the core itself. If requested on non-v7-M targets, it will fall back to <codeclass="highlighter-rouge">SW_EMULATED</code>.</li>
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<li><codeclass="highlighter-rouge">ResetType.SW_EMULATED</code>: Restores the core to reset conditions by writing registers. However, this
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<li><codeclass="highlighter-rouge">ResetType.VECTRESET</code>: Software reset using VECTRESET, only available on v7-M targets. This
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resets only the core itself. If requested on non-v7-M targets, it will fall back to <codeclass="highlighter-rouge">ResetType.EMULATED</code>.</li>
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<li><codeclass="highlighter-rouge">ResetType.EMULATED</code>: Restores the core to reset conditions by writing registers. However, this
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will not trigger a reset vector catch.</li>
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</ul>
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<p>The <codeclass="highlighter-rouge">CortexM</code> objects have <codeclass="highlighter-rouge">default_reset_type</code> and <codeclass="highlighter-rouge">default_software_reset_type</code> properties that
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let you control the overall default reset type (any one of the <codeclass="highlighter-rouge">ResetType</code> enums), as well as the
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default if <codeclass="highlighter-rouge">ResetType.SW</code> is selected, respectively.</p>
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<p>The <codeclass="highlighter-rouge">CortexM</code> objects have a <codeclass="highlighter-rouge">default_reset_type</code> property that lets you control the overall default reset type.
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Property value can be any one of the <codeclass="highlighter-rouge">ResetType</code> enums.</p>
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<p>Another option for performing a halting reset is by setting vector catch with the target’s <codeclass="highlighter-rouge">set_vector_catch()</code>
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method, then using a normal reset. This has the benefit of always halting at reset, if you leave the
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