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Author: pyocd-bot

docs/builtin-targets.html

@@ -235,6 +235,36 @@ <h5 class="sidebar-header">On this page</h5>
 
 <tr><th>Target Type Name</th><th>Vendor</th><th>Name</th></tr>
 
+    <tr><td><code>air001</code></td>
+    <td>AirM2M</td>
+    <td>Air001</td>
+    </tr>
+
+    <tr><td><code>air32f103xb</code></td>
+    <td>AirM2M</td>
+    <td>Air32F103xB</td>
+    </tr>
+
+    <tr><td><code>air32f103xc</code></td>
+    <td>AirM2M</td>
+    <td>Air32F103xC</td>
+    </tr>
+
+    <tr><td><code>air32f103xe</code></td>
+    <td>AirM2M</td>
+    <td>Air32F103xE</td>
+    </tr>
+
+    <tr><td><code>air32f103xg</code></td>
+    <td>AirM2M</td>
+    <td>Air32F103xG</td>
+    </tr>
+
+    <tr><td><code>air32f103xp</code></td>
+    <td>AirM2M</td>
+    <td>Air32F103xP</td>
+    </tr>
+
     <tr><td><code>cc3220sf</code></td>
     <td>Texas Instruments</td>
     <td>CC3220SF</td>
@@ -355,6 +385,16 @@ <h5 class="sidebar-header">On this page</h5>
     <td>CY8C6xxA</td>
     </tr>
 
+    <tr><td><code>hc32a460xe</code></td>
+    <td>HDSC</td>
+    <td>HC32F460xE</td>
+    </tr>
+
+    <tr><td><code>hc32a4a0xi</code></td>
+    <td>HDSC</td>
+    <td>HC32F4A0xI</td>
+    </tr>
+
     <tr><td><code>hc32f003</code></td>
     <td>HDSC</td>
     <td>HC32F003</td>
@@ -405,6 +445,16 @@ <h5 class="sidebar-header">On this page</h5>
     <td>HC32F196</td>
     </tr>
 
+    <tr><td><code>hc32f448xa</code></td>
+    <td>HDSC</td>
+    <td>HC32F448xA</td>
+    </tr>
+
+    <tr><td><code>hc32f448xc</code></td>
+    <td>HDSC</td>
+    <td>HC32F448xC</td>
+    </tr>
+
     <tr><td><code>hc32f451xc</code></td>
     <td>HDSC</td>
     <td>HC32F451xC</td>
@@ -775,6 +825,11 @@ <h5 class="sidebar-header">On this page</h5>
     <td>MAX32660</td>
     </tr>
 
+    <tr><td><code>max32666</code></td>
+    <td>Maxim</td>
+    <td>MAX32666</td>
+    </tr>
+
     <tr><td><code>max32670</code></td>
     <td>Maxim</td>
     <td>MAX32670</td>
@@ -895,6 +950,11 @@ <h5 class="sidebar-header">On this page</h5>
     <td>NRF52840</td>
     </tr>
 
+    <tr><td><code>nrf91</code></td>
+    <td>Nordic Semiconductor</td>
+    <td>NRF91XX</td>
+    </tr>
+
     <tr><td><code>rp2040</code></td>
     <td>Raspberry Pi</td>
     <td>RP2040Core0</td>
@@ -915,6 +975,16 @@ <h5 class="sidebar-header">On this page</h5>
     <td>RTL8195AM</td>
     </tr>
 
+    <tr><td><code>rtl8762c</code></td>
+    <td>Realtek Semiconductor</td>
+    <td>RTL8762C</td>
+    </tr>
+
+    <tr><td><code>s32k344</code></td>
+    <td>NXP</td>
+    <td>S32K344</td>
+    </tr>
+
     <tr><td><code>s5js100</code></td>
     <td>Samsung</td>
     <td>S5JS100</td>
@@ -965,6 +1035,21 @@ <h5 class="sidebar-header">On this page</h5>
     <td>STM32F767xx</td>
     </tr>
 
+    <tr><td><code>stm32h723xx</code></td>
+    <td>STMicroelectronics</td>
+    <td>STM32H723xx</td>
+    </tr>
+
+    <tr><td><code>stm32h743xx</code></td>
+    <td>STMicroelectronics</td>
+    <td>STM32H743xx</td>
+    </tr>
+
+    <tr><td><code>stm32h7b0xx</code></td>
+    <td>STMicroelectronics</td>
+    <td>STM32H7B0xx</td>
+    </tr>
+
     <tr><td><code>stm32l031x6</code></td>
     <td>STMicroelectronics</td>
     <td>STM32L031x6</td>

docs/command_reference.html

@@ -306,6 +306,11 @@ <h5 class="sidebar-header">On this page</h5>
 <li class="toc-entry toc-h5"><a href="#write8">write8</a></li>
 </ul>
 </li>
+<li class="toc-entry toc-h3"><a href="#nrf91">Nrf91</a>
+<ul>
+<li class="toc-entry toc-h5"><a href="#nrf91-update-modem-fw">nrf91-update-modem-fw</a></li>
+</ul>
+</li>
 <li class="toc-entry toc-h3"><a href="#openocd-compatibility">Openocd compatibility</a>
 <ul>
 <li class="toc-entry toc-h5"><a href="#init">init</a></li>
@@ -763,6 +768,16 @@ <h2 id="all-commands">All commands</h2>
 Write 8-bit bytes to memory.
 </td></tr>
 
+<tr><td colspan="3"><b>Nrf91</b></td></tr>
+
+<tr><td>
+<a href="#nrf91-update-modem-fw"><tt>nrf91-update-modem-fw</tt></a>
+</td><td>
+[-f] mfw_nrf91xx_x.x.x.zip
+</td><td>
+Update modem firmware for an nRF91 target.
+</td></tr>
+
 <tr><td colspan="3"><b>Openocd_compatibility</b></td></tr>
 
 <tr><td>
@@ -1344,6 +1359,13 @@ <h5 id="write8"><code class="highlighter-rouge">write8</code></h5>
 <strong>Usage</strong>: write8 ADDR DATA+ <br />
 Write 8-bit bytes to memory. The data arguments are 8-bit bytes. Can write to both RAM and flash. Flash writes are subject to minimum write size and alignment, and the flash page must have been previously erased.</p>
 
+<h3 id="nrf91">Nrf91</h3>
+
+<h5 id="nrf91-update-modem-fw"><code class="highlighter-rouge">nrf91-update-modem-fw</code></h5>
+
+<p><strong>Usage</strong>: nrf91-update-modem-fw [-f] mfw_nrf91xx_x.x.x.zip <br />
+Update modem firmware for an nRF91 target. If -f is specified, modem firmware is written to the device, even if the correct version is already present.</p>
+
 <h3 id="openocd-compatibility">Openocd compatibility</h3>
 
 <h5 id="init"><code class="highlighter-rouge">init</code></h5>

docs/debug_probes.html

@@ -239,6 +239,7 @@ <h5 class="sidebar-header">On this page</h5>
 <li class="toc-entry toc-h4"><a href="#microchip-edbg">Microchip EDBG</a></li>
 </ul>
 </li>
+<li class="toc-entry toc-h3"><a href="#ti-xds110">TI XDS110</a></li>
 <li class="toc-entry toc-h3"><a href="#pe-micro-cyclone-and-multilink">PE Micro Cyclone and Multilink</a></li>
 <li class="toc-entry toc-h3"><a href="#stlink">STLink</a>
 <ul>
@@ -475,6 +476,10 @@ <h4 id="microchip-edbg">Microchip EDBG</h4>
 <p>The Microchip (previously Atmel) EDBG probe firmware, at the time of this writing, provides a CMSIS-DAP v1 interface.
 On macOS, reading command responses always times out. The probe works on other OSes, however.</p>
 
+<h3 id="ti-xds110">TI XDS110</h3>
+
+<p>XDS110 firmware version 03.00.00.25 is known to have an issue when using multiple outstanding packets (the default setting). To work around this, set the <code class="highlighter-rouge">cmsis_dap.limit_packets</code> session option, e.g. <code class="highlighter-rouge">-Ocmsis_dap.limit_packets=1</code> on the command line. Earlier firmware versions most likely exhibit the issue; it is unknown whether it is fixed in more recent versions.</p>
+
 <h3 id="pe-micro-cyclone-and-multilink">PE Micro Cyclone and Multilink</h3>
 
 <p>The Cyclone and Multilink debug probes from PE Micro are supported through the use of a separate probe driver

docs/open_cmsis_pack_support.html

@@ -251,7 +251,7 @@ <h5 class="sidebar-header">On this page</h5>
 </li>
 <li class="toc-entry toc-h2"><a href="#pyocds-debug-sequence-implementation">PyOCD’s debug sequence implementation</a>
 <ul>
-<li class="toc-entry toc-h3"><a href="#cpu-specific-debugport-sequences">CPU-specific DebugPort sequences</a></li>
+<li class="toc-entry toc-h3"><a href="#core-specific-sequences">Core-specific sequences</a></li>
 <li class="toc-entry toc-h3"><a href="#custom-default-reset-sequences">Custom default reset sequences</a></li>
 <li class="toc-entry toc-h3"><a href="#debug-sequences-and-delegate-functions">Debug sequences and delegate functions</a></li>
 <li class="toc-entry toc-h3"><a href="#supported-debug-sequences">Supported debug sequences</a></li>
@@ -358,9 +358,15 @@ <h2 id="pyocds-debug-sequence-implementation">PyOCD’s debug sequence implement
 
 <p>This section documents details of the debug sequence engine provided by pyOCD, supported features, and any notable differences with other debuggers (primarily Keil MDK, which provided the first implementation and against which Packs are generally most thoroughly tested by their authors).</p>
 
-<h3 id="cpu-specific-debugport-sequences">CPU-specific DebugPort sequences</h3>
+<h3 id="core-specific-sequences">Core-specific sequences</h3>
 
-<p>Like all other debug sequences, <code class="highlighter-rouge">DebugPortSetup</code>, <code class="highlighter-rouge">DebugPortStart</code>, and <code class="highlighter-rouge">DebugPortStop</code> can be customised per CPU core. If a DFP has multiple CPU-specific instances of these sequences, they may behave differently in pyOCD than other debuggers. Many debuggers only “connect” to a single CPU chosen by the user when debugging or running a project. PyOCD is somewhat different in that it connects to the device as a whole, and then debugs a chosen core after the connection is established (which more closely reflects the hardware situation).</p>
+<p>The DFP debug sequence architecture is currently based on the fact that most debuggers only “connect” to a single CPU core chosen by the user when debugging or running a project. All debug sequences can be customised per core, and there can be separate sequences for each core.</p>
+
+<p>PyOCD is somewhat different in that it connects to the device as a whole, and then debugs one or more cores after the connection is established. This more closely reflects the hardware situation.</p>
+
+<p>This primarily impacts the <code class="highlighter-rouge">DebugPortSetup</code>, <code class="highlighter-rouge">DebugPortStart</code>, <code class="highlighter-rouge">DebugPortStop</code>, and <code class="highlighter-rouge">DebugDeviceUnlock</code> debug sequences that affect the entire SoC. These relate to the connect procedure for the Arm ADI DP (Debug Port) used for SWD/JTAG communications. While most sequences can be run separately for each core, these are run only once per target connection. The core-specific variant that is selected can affect the rest of the debugging session. (Technically, this is also true for debuggers that are presented as debugging a single core, in cases where a second instance of that debugger can be started to debug another core. But, the way it’s presented to the user is different.)</p>
+
+<p>The <code class="highlighter-rouge">primary_core</code> session option is used to select which core-specific version of the <code class="highlighter-rouge">DebugPort*</code>/<code class="highlighter-rouge">DebugDeviceUnlock</code> sequences is run during the target connection process. For all other sequences, the core-specific version that is run depends on which core is performing the action.</p>
 
 <h3 id="custom-default-reset-sequences">Custom default reset sequences</h3>