Skip to content

Commit 0717898

Browse files
authored
Fix cl::desc typos in aarch64-enable-dead-defs and arm-implicit-it. (llvm#106712)
1 parent 2c7e1b8 commit 0717898

File tree

2 files changed

+2
-2
lines changed

2 files changed

+2
-2
lines changed

llvm/lib/Target/AArch64/AArch64TargetMachine.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -98,7 +98,7 @@ static cl::opt<bool> EnableCollectLOH(
9898
static cl::opt<bool>
9999
EnableDeadRegisterElimination("aarch64-enable-dead-defs", cl::Hidden,
100100
cl::desc("Enable the pass that removes dead"
101-
" definitons and replaces stores to"
101+
" definitions and replaces stores to"
102102
" them with stores to the zero"
103103
" register"),
104104
cl::init(true));

llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -79,7 +79,7 @@ enum class ImplicitItModeTy { Always, Never, ARMOnly, ThumbOnly };
7979

8080
static cl::opt<ImplicitItModeTy> ImplicitItMode(
8181
"arm-implicit-it", cl::init(ImplicitItModeTy::ARMOnly),
82-
cl::desc("Allow conditional instructions outdside of an IT block"),
82+
cl::desc("Allow conditional instructions outside of an IT block"),
8383
cl::values(clEnumValN(ImplicitItModeTy::Always, "always",
8484
"Accept in both ISAs, emit implicit ITs in Thumb"),
8585
clEnumValN(ImplicitItModeTy::Never, "never",

0 commit comments

Comments
 (0)