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Jessica Paquette
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[GlobalISel] NFC: Add some test coverage for s158
158 = 32 * 5 - 2 This is a wide type which may benefit from a different widening scheme than types which are multiples of 64. For example, if 32-bit and 64-bit scalars are both allowed, and a type is a multiple of 32, or is closer to a multiple of 32, it *may* be better to - Widen to the wide multiple of 32 - Break up the type into 32-bit chunks Anyway, we don't have any test coverage for this at all, so for the sake of making sure we test it, let's add some test coverage.
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‎llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir

Lines changed: 44 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -114,3 +114,47 @@ body: |
114114
%and:_(s318) = G_AND %a, %b
115115
G_STORE %and(s318), %ptr(p0) :: (store (s318))
116116
RET_ReallyLR implicit $x0
117+
...
118+
---
119+
name: test_s158_and
120+
tracksRegLiveness: true
121+
body: |
122+
bb.0:
123+
liveins: $x0
124+
; CHECK-LABEL: name: test_s158_and
125+
; CHECK: liveins: $x0
126+
; CHECK-NEXT: {{ $}}
127+
; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
128+
; CHECK-NEXT: %ptr:_(p0) = COPY $x0
129+
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[DEF]]
130+
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[DEF]]
131+
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[DEF]]
132+
; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[DEF]]
133+
; CHECK-NEXT: [[AND4:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[DEF]]
134+
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
135+
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4611686018427387903
136+
; CHECK-NEXT: [[AND5:%[0-9]+]]:_(s64) = G_AND [[AND]], [[C]]
137+
; CHECK-NEXT: [[AND6:%[0-9]+]]:_(s64) = G_AND [[AND1]], [[C]]
138+
; CHECK-NEXT: [[AND7:%[0-9]+]]:_(s64) = G_AND [[AND2]], [[C]]
139+
; CHECK-NEXT: [[AND8:%[0-9]+]]:_(s64) = G_AND [[AND3]], [[C]]
140+
; CHECK-NEXT: [[AND9:%[0-9]+]]:_(s64) = G_AND [[AND4]], [[C1]]
141+
; CHECK-NEXT: G_STORE [[AND5]](s64), %ptr(p0) :: (store (s64), align 64)
142+
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
143+
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C2]](s64)
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; CHECK-NEXT: G_STORE [[AND6]](s64), [[PTR_ADD]](p0) :: (store (s64) into unknown-address + 8)
145+
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
146+
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C3]](s64)
147+
; CHECK-NEXT: G_STORE [[AND7]](s64), [[PTR_ADD1]](p0) :: (store (s64) into unknown-address + 16, align 16)
148+
; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 24
149+
; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C4]](s64)
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; CHECK-NEXT: G_STORE [[AND8]](s64), [[PTR_ADD2]](p0) :: (store (s64) into unknown-address + 24)
151+
; CHECK-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
152+
; CHECK-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C5]](s64)
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; CHECK-NEXT: G_STORE [[AND9]](s64), [[PTR_ADD3]](p0) :: (store (s64) into unknown-address + 32, align 32)
154+
; CHECK-NEXT: RET_ReallyLR implicit $x0
155+
%a:_(s318) = G_IMPLICIT_DEF
156+
%b:_(s318) = G_IMPLICIT_DEF
157+
%ptr:_(p0) = COPY $x0
158+
%and:_(s318) = G_AND %a, %b
159+
G_STORE %and(s318), %ptr(p0) :: (store (s318))
160+
RET_ReallyLR implicit $x0

‎llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir

Lines changed: 47 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2-
# RUN: llc -O0 -march=aarch64 -run-pass=legalizer -global-isel-abort=1 %s -o - | FileCheck %s
2+
# RUN: llc -O0 -march=aarch64 -run-pass=legalizer -global-isel-abort=1 -verify-machineinstrs %s -o - | FileCheck %s
33
---
44
name: test_icmp
55
body: |
@@ -189,6 +189,7 @@ body: |
189189
; CHECK-LABEL: name: test_s96_eq
190190
; CHECK: bb.0:
191191
; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)
192+
; CHECK: {{ $}}
192193
; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
193194
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
194195
; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4294967295
@@ -279,3 +280,48 @@ body: |
279280
successors:
280281
bb.3:
281282
RET_ReallyLR
283+
...
284+
---
285+
name: test_s158_eq
286+
tracksRegLiveness: true
287+
body: |
288+
; CHECK-LABEL: name: test_s158_eq
289+
; CHECK: bb.0:
290+
; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)
291+
; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
292+
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
293+
; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1073741823
294+
; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
295+
; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
296+
; CHECK: [[AND1:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
297+
; CHECK: [[AND2:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]
298+
; CHECK: [[AND3:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C2]]
299+
; CHECK: [[AND4:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
300+
; CHECK: [[AND5:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
301+
; CHECK: [[AND6:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]
302+
; CHECK: [[AND7:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C2]]
303+
; CHECK: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[AND]], [[AND4]]
304+
; CHECK: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[AND1]], [[AND5]]
305+
; CHECK: [[XOR2:%[0-9]+]]:_(s64) = G_XOR [[AND2]], [[AND6]]
306+
; CHECK: [[XOR3:%[0-9]+]]:_(s64) = G_XOR [[AND3]], [[AND7]]
307+
; CHECK: [[OR:%[0-9]+]]:_(s64) = G_OR [[XOR]], [[XOR1]]
308+
; CHECK: [[OR1:%[0-9]+]]:_(s64) = G_OR [[OR]], [[XOR2]]
309+
; CHECK: [[OR2:%[0-9]+]]:_(s64) = G_OR [[OR1]], [[XOR3]]
310+
; CHECK: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[OR2]](s64), [[C2]]
311+
; CHECK: %cmp:_(s1) = G_TRUNC [[ICMP]](s32)
312+
; CHECK: G_BRCOND %cmp(s1), %bb.1
313+
; CHECK: G_BR %bb.2
314+
; CHECK: bb.1:
315+
; CHECK: successors:
316+
; CHECK: bb.2:
317+
; CHECK: RET_ReallyLR
318+
bb.1:
319+
%lhs:_(s158) = G_IMPLICIT_DEF
320+
%rhs:_(s158) = G_IMPLICIT_DEF
321+
%cmp:_(s1) = G_ICMP intpred(eq), %lhs(s158), %rhs
322+
G_BRCOND %cmp(s1), %bb.2
323+
G_BR %bb.3
324+
bb.2:
325+
successors:
326+
bb.3:
327+
RET_ReallyLR

‎llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir

Lines changed: 31 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -110,3 +110,34 @@ body: |
110110
G_STORE %cst(s318), %ptr(p0) :: (store (s318))
111111
RET_ReallyLR implicit $w0
112112
...
113+
---
114+
name: s158
115+
registers:
116+
body: |
117+
bb.0:
118+
liveins: $x0
119+
; CHECK-LABEL: name: s158
120+
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1234
121+
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
122+
; CHECK-NEXT: %ptr:_(p0) = COPY $x0
123+
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
124+
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 1073741823
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; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[C]], [[C2]]
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; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[C1]], [[C2]]
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; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[C1]], [[C3]]
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[AND]](s64)
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY [[AND1]](s64)
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; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[AND2]](s64), 0
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; CHECK-NEXT: G_STORE [[COPY]](s64), %ptr(p0) :: (store (s64), align 32)
132+
; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
133+
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C4]](s64)
134+
; CHECK-NEXT: G_STORE [[COPY1]](s64), [[PTR_ADD]](p0) :: (store (s64) into unknown-address + 8)
135+
; CHECK-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
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; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C5]](s64)
137+
; CHECK-NEXT: G_STORE [[EXTRACT]](s32), [[PTR_ADD1]](p0) :: (store (s32) into unknown-address + 16, align 16)
138+
; CHECK-NEXT: RET_ReallyLR implicit $w0
139+
%cst:_(s158) = G_CONSTANT i158 1234
140+
%ptr:_(p0) = COPY $x0
141+
G_STORE %cst(s158), %ptr(p0) :: (store (s158))
142+
RET_ReallyLR implicit $w0
143+
...

‎llvm/test/CodeGen/AArch64/GlobalISel/legalize-non-pow2-load-store.mir

Lines changed: 33 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -107,3 +107,36 @@ body: |
107107
%val:_(s318) = G_IMPLICIT_DEF
108108
G_STORE %val(s318), %ptr(p0) :: (store (s318), align 8)
109109
RET_ReallyLR
110+
...
111+
---
112+
name: store_s158
113+
alignment: 4
114+
tracksRegLiveness: true
115+
body: |
116+
bb.0:
117+
liveins: $x0
118+
; CHECK-LABEL: name: store_s158
119+
; CHECK: liveins: $x0
120+
; CHECK-NEXT: {{ $}}
121+
; CHECK-NEXT: %ptr:_(p0) = COPY $x0
122+
; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
123+
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
124+
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1073741823
125+
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
126+
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
127+
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]
128+
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[AND]](s64)
129+
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY [[AND1]](s64)
130+
; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[AND2]](s64), 0
131+
; CHECK-NEXT: G_STORE [[COPY]](s64), %ptr(p0) :: (store (s64))
132+
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
133+
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C2]](s64)
134+
; CHECK-NEXT: G_STORE [[COPY1]](s64), [[PTR_ADD]](p0) :: (store (s64) into unknown-address + 8)
135+
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
136+
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C3]](s64)
137+
; CHECK-NEXT: G_STORE [[EXTRACT]](s32), [[PTR_ADD1]](p0) :: (store (s32) into unknown-address + 16, align 8)
138+
; CHECK-NEXT: RET_ReallyLR
139+
%ptr:_(p0) = COPY $x0
140+
%val:_(s158) = G_IMPLICIT_DEF
141+
G_STORE %val(s158), %ptr(p0) :: (store (s158), align 8)
142+
RET_ReallyLR

‎llvm/test/CodeGen/AArch64/GlobalISel/legalize-xor.mir

Lines changed: 37 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -108,3 +108,40 @@ body: |
108108
%xor:_(s319) = G_XOR %a, %b
109109
G_STORE %xor(s319), %ptr(p0) :: (store (s319))
110110
RET_ReallyLR implicit $x0
111+
...
112+
---
113+
name: test_s158_xor
114+
tracksRegLiveness: true
115+
body: |
116+
bb.0:
117+
liveins: $x0
118+
; CHECK-LABEL: name: test_s158_xor
119+
; CHECK: liveins: $x0
120+
; CHECK-NEXT: {{ $}}
121+
; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
122+
; CHECK-NEXT: %ptr:_(p0) = COPY $x0
123+
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[DEF]], [[DEF]]
124+
; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[DEF]], [[DEF]]
125+
; CHECK-NEXT: [[XOR2:%[0-9]+]]:_(s64) = G_XOR [[DEF]], [[DEF]]
126+
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
127+
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1073741823
128+
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[XOR]], [[C]]
129+
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[XOR1]], [[C]]
130+
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[XOR2]], [[C1]]
131+
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[AND]](s64)
132+
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY [[AND1]](s64)
133+
; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[AND2]](s64), 0
134+
; CHECK-NEXT: G_STORE [[COPY]](s64), %ptr(p0) :: (store (s64), align 32)
135+
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
136+
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C2]](s64)
137+
; CHECK-NEXT: G_STORE [[COPY1]](s64), [[PTR_ADD]](p0) :: (store (s64) into unknown-address + 8)
138+
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
139+
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C3]](s64)
140+
; CHECK-NEXT: G_STORE [[EXTRACT]](s32), [[PTR_ADD1]](p0) :: (store (s32) into unknown-address + 16, align 16)
141+
; CHECK-NEXT: RET_ReallyLR implicit $x0
142+
%a:_(s158) = G_IMPLICIT_DEF
143+
%b:_(s158) = G_IMPLICIT_DEF
144+
%ptr:_(p0) = COPY $x0
145+
%xor:_(s158) = G_XOR %a, %b
146+
G_STORE %xor(s158), %ptr(p0) :: (store (s158))
147+
RET_ReallyLR implicit $x0

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