Skip to content

Commit 960d338

Browse files
narendasannarendasan
authored
Merge pull request #225 from NVIDIA/pytorch_update
Pytorch 1.7 update API changes
2 parents d8151d9 + 1ce3e4f commit 960d338

File tree

16 files changed

+127
-115
lines changed

16 files changed

+127
-115
lines changed

‎.bazelversion

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1 +1 @@
1-
3.4.1
1+
3.7.0

‎README.md

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -71,12 +71,13 @@ torch.jit.save(trt_ts_module, "trt_torchscript_module.ts")
7171
> Note: Refer NVIDIA NGC container(https://ngc.nvidia.com/catalog/containers/nvidia:l4t-pytorch) for PyTorch libraries on JetPack.
7272
7373
### Dependencies
74+
These are the following dependencies used to verify the testcases. TRTorch can work with other versions, but the tests are not guaranteed to pass.
7475

75-
- Bazel 3.3.1
76-
- Libtorch 1.5.1
77-
- CUDA 10.2
78-
- cuDNN 7.6.5 (by default, cuDNN 8 supported with compatable PyTorch build)
79-
- TensorRT 7.0.0 (by default, TensorRT 7.1 supported with compatable PyTorch build)
76+
- Bazel 3.7.0
77+
- Libtorch 1.7.1 (built with CUDA 11.0)
78+
- CUDA 11.0
79+
- cuDNN 8
80+
- TensorRT 7.2.1.6
8081

8182
## Prebuilt Binaries and Wheel files
8283

‎WORKSPACE

Lines changed: 10 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -35,7 +35,7 @@ git_repository(
3535
# CUDA should be installed on the system locally
3636
new_local_repository(
3737
name = "cuda",
38-
path = "/usr/local/cuda-10.2/",
38+
path = "/usr/local/cuda-11.0/",
3939
build_file = "@//third_party/cuda:BUILD",
4040
)
4141

@@ -53,16 +53,16 @@ http_archive(
5353
name = "libtorch",
5454
build_file = "@//third_party/libtorch:BUILD",
5555
strip_prefix = "libtorch",
56-
urls = ["https://download.pytorch.org/libtorch/cu102/libtorch-cxx11-abi-shared-with-deps-1.6.0.zip"],
57-
sha256 = "fded948bd2dbee625cee33ebbd4843a69496729389e0200a90fbb667cdaeeb69"
56+
sha256 = "117f6dd65b7267839197397edd0b10fd2900b0f291e3e54b0b800caefc31bcb6",
57+
urls = ["https://download.pytorch.org/libtorch/cu110/libtorch-cxx11-abi-shared-with-deps-1.7.1%2Bcu110.zip"],
5858
)
5959

6060
http_archive(
6161
name = "libtorch_pre_cxx11_abi",
6262
build_file = "@//third_party/libtorch:BUILD",
6363
strip_prefix = "libtorch",
64-
sha256 = "141bb229f4bbf905541096cf8705785e7b0c79e37ca1e5db9d372730b1b9abd7",
65-
urls = ["https://download.pytorch.org/libtorch/cu102/libtorch-shared-with-deps-1.6.0.zip"],
64+
sha256 = "c77f926afd55d7e860ec9c7abc992c25be77c89771c3ec6fcc13ea42f07d46df",
65+
urls = ["https://download.pytorch.org/libtorch/cu110/libtorch-shared-with-deps-1.7.1%2Bcu110.zip"],
6666
)
6767

6868
# Download these tarballs manually from the NVIDIA website
@@ -71,18 +71,18 @@ http_archive(
7171

7272
http_archive(
7373
name = "cudnn",
74-
urls = ["https://developer.nvidia.com/compute/machine-learning/cudnn/secure/7.6.5.32/Production/10.2_20191118/cudnn-10.2-linux-x64-v7.6.5.32.tgz",],
74+
urls = ["https://developer.nvidia.com/compute/machine-learning/cudnn/secure/8.0.5/11.0_20201106/cudnn-11.0-linux-x64-v8.0.5.39.tgz",],
7575
build_file = "@//third_party/cudnn/archive:BUILD",
76-
sha256 = "600267f2caaed2fd58eb214ba669d8ea35f396a7d19b94822e6b36f9f7088c20",
76+
sha256 = "4e16ee7895deb4a8b1c194b812ba49586ef7d26902051401d3717511898a9b73",
7777
strip_prefix = "cuda"
7878
)
7979

8080
http_archive(
8181
name = "tensorrt",
82-
urls = ["https://developer.nvidia.com/compute/machine-learning/tensorrt/secure/7.0/7.0.0.11/tars/TensorRT-7.0.0.11.Ubuntu-18.04.x86_64-gnu.cuda-10.2.cudnn7.6.tar.gz",],
82+
urls = ["https://developer.nvidia.com/compute/machine-learning/tensorrt/secure/7.2.1/tars/TensorRT-7.2.1.6.Ubuntu-18.04.x86_64-gnu.cuda-11.0.cudnn8.0.tar.gz",],
8383
build_file = "@//third_party/tensorrt/archive:BUILD",
84-
sha256 = "c7d73b2585b18aae68b740249efa8c8ba5ae852abe9a023720595432a8eb4efd",
85-
strip_prefix = "TensorRT-7.0.0.11"
84+
sha256 = "8def6b03b0c8c3751f560df21b3e99668ae05aab5140b1d38b8e51e4a0ffbbb8",
85+
strip_prefix = "TensorRT-7.2.1.6"
8686
)
8787

8888
####################################################################################
@@ -146,5 +146,3 @@ pip3_import(
146146

147147
load("@pylinter_deps//:requirements.bzl", "pip_install")
148148
pip_install()
149-
150-

‎core/conversion/InterfaceTypes.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,7 @@ GraphParams get_named_params(c10::ArrayRef<torch::jit::Value*> inputs, std::vect
1111
GraphParams named_params;
1212
auto param_it = params.begin();
1313
for (auto in : inputs) {
14-
if (in->type() != c10::TensorType::get() && in->isCompleteTensor() && param_it != params.end()) {
14+
if (in->type() != c10::TensorType::get() && param_it != params.end()) {
1515
named_params[in] = *param_it;
1616
++param_it;
1717
}

‎core/conversion/converters/impl/conv_deconv.cpp

Lines changed: 83 additions & 66 deletions
Original file line numberDiff line numberDiff line change
@@ -9,82 +9,99 @@ namespace conversion {
99
namespace converters {
1010
namespace impl {
1111
namespace {
12-
auto conv_registrations TRTORCH_UNUSED = RegisterNodeConversionPatterns().pattern({
13-
R"SIG(aten::_convolution(Tensor input, Tensor weight,
14-
Tensor? bias, int[] stride, int[] padding,
15-
int[] dilation, bool transposed,
16-
int[] output_padding, int groups, bool benchmark,
17-
bool deterministic, bool cudnn_enabled) -> (Tensor))SIG",
18-
[](ConversionCtx* ctx, const torch::jit::Node* n, args& args) -> bool {
19-
auto in = args[0].ITensor(); // assumes non-static input Tensor
20-
auto w = Weights(ctx, args[1].unwrapToTensor());
21-
auto stride = util::toDims(args[3].unwrapToIntList());
22-
LOG_DEBUG("stride: " << stride);
23-
auto padding = util::toDims(args[4].unwrapToIntList());
24-
LOG_DEBUG("padding: " << padding);
25-
auto dilation = util::toDims(args[5].unwrapToIntList());
26-
LOG_DEBUG("dilation: " << dilation);
27-
bool transposed = args[6].unwrapToBool();
28-
auto out_padding = util::toDims(args[7].unwrapToIntList());
29-
LOG_DEBUG("out_padding: " << out_padding);
30-
int64_t groups = args[8].unwrapToInt();
31-
LOG_DEBUG("groups: " << groups);
3212

33-
nvinfer1::ILayer* new_layer;
34-
if (transposed) {
35-
Weights bias;
36-
if (args[2].IValue()->isTensor()) {
37-
bias = Weights(ctx, args[2].unwrapToTensor());
38-
} else {
39-
bias = Weights(ctx, torch::zeros(args[1].unwrapToTensor().sizes()[1] * groups));
40-
}
13+
bool add_conv_deconv(ConversionCtx* ctx, const torch::jit::Node* n, args& args) {
14+
auto in = args[0].ITensor(); // assumes non-static input Tensor
15+
auto w = Weights(ctx, args[1].unwrapToTensor());
16+
auto stride = util::toDims(args[3].unwrapToIntList());
17+
LOG_DEBUG("stride: " << stride);
18+
auto padding = util::toDims(args[4].unwrapToIntList());
19+
LOG_DEBUG("padding: " << padding);
20+
auto dilation = util::toDims(args[5].unwrapToIntList());
21+
LOG_DEBUG("dilation: " << dilation);
22+
bool transposed = args[6].unwrapToBool();
23+
auto out_padding = util::toDims(args[7].unwrapToIntList());
24+
LOG_DEBUG("out_padding: " << out_padding);
25+
int64_t groups = args[8].unwrapToInt();
26+
LOG_DEBUG("groups: " << groups);
27+
28+
nvinfer1::ILayer* new_layer;
29+
if (transposed) {
30+
Weights bias;
31+
if (args[2].IValue()->isTensor()) {
32+
bias = Weights(ctx, args[2].unwrapToTensor());
33+
} else {
34+
bias = Weights(ctx, torch::zeros(args[1].unwrapToTensor().sizes()[1] * groups));
35+
}
4136

42-
// shape of deconvolution's weight: [in, out/groups, ...]
43-
auto deconv = ctx->net->addDeconvolutionNd(
44-
*in, args[1].unwrapToTensor().sizes()[1] * groups, w.kernel_shape, w.data, bias.data);
45-
TRTORCH_CHECK(deconv, "Unable to create deconvolution layer from node: " << *n);
37+
// shape of deconvolution's weight: [in, out/groups, ...]
38+
auto deconv = ctx->net->addDeconvolutionNd(
39+
*in, args[1].unwrapToTensor().sizes()[1] * groups, w.kernel_shape, w.data, bias.data);
40+
TRTORCH_CHECK(deconv, "Unable to create deconvolution layer from node: " << *n);
4641

47-
deconv->setStrideNd(stride);
48-
deconv->setPaddingNd(padding);
49-
#if NV_TENSORRT_MAJOR > 7 || (NV_TENSORRT_MAJOR == 7 && NV_TENSORRT_MINOR == 1)
50-
deconv->setDilationNd(dilation);
51-
deconv->setNbGroups(groups);
42+
deconv->setStrideNd(stride);
43+
deconv->setPaddingNd(padding);
44+
#if NV_TENSORRT_MAJOR > 7 || (NV_TENSORRT_MAJOR == 7 && NV_TENSORRT_MINOR >= 1)
45+
deconv->setDilationNd(dilation);
46+
deconv->setNbGroups(groups);
5247
#else
53-
TRTORCH_CHECK(groups == 1, "for deconv with groups > 1, require TensorRT version >= 7.1");
54-
for (auto it = dilation.begin(); it != dilation.end(); ++it) {
55-
TRTORCH_CHECK(*it == 1, "for deconv with dilation > 1, require TensorRT version >= 7.1");
56-
}
48+
TRTORCH_CHECK(groups == 1, "for deconv with groups > 1, require TensorRT version >= 7.1");
49+
for (int idx = 0; idx < dilation.nbDims; idx++) {
50+
TRTORCH_CHECK(dilation.d[idx] == 1, "for deconv with dilation > 1, require TensorRT version >= 7.1");
51+
}
5752
#endif
58-
new_layer = deconv;
59-
} else {
60-
Weights bias;
61-
if (args[2].IValue()->isTensor()) {
62-
bias = Weights(ctx, args[2].unwrapToTensor());
63-
} else {
64-
bias = Weights(ctx, torch::zeros(args[1].unwrapToTensor().sizes()[0]));
65-
}
53+
new_layer = deconv;
54+
} else {
55+
Weights bias;
56+
if (args[2].IValue()->isTensor()) {
57+
bias = Weights(ctx, args[2].unwrapToTensor());
58+
} else {
59+
bias = Weights(ctx, torch::zeros(args[1].unwrapToTensor().sizes()[0]));
60+
}
6661

67-
// shape of convolution's weight: [out, in/groups, ...]
68-
auto conv =
69-
ctx->net->addConvolutionNd(*in, args[1].unwrapToTensor().sizes()[0], w.kernel_shape, w.data, bias.data);
70-
TRTORCH_CHECK(conv, "Unable to create convolution layer from node: " << *n);
62+
// shape of convolution's weight: [out, in/groups, ...]
63+
auto conv = ctx->net->addConvolutionNd(*in, args[1].unwrapToTensor().sizes()[0], w.kernel_shape, w.data, bias.data);
64+
TRTORCH_CHECK(conv, "Unable to create convolution layer from node: " << *n);
7165

72-
conv->setStrideNd(stride);
73-
conv->setPaddingMode(nvinfer1::PaddingMode::kCAFFE_ROUND_DOWN);
74-
conv->setPaddingNd(padding);
75-
conv->setPostPadding(out_padding);
76-
conv->setDilationNd(dilation);
77-
conv->setNbGroups(groups);
78-
new_layer = conv;
79-
}
80-
new_layer->setName(util::node_info(n).c_str());
66+
conv->setStrideNd(stride);
67+
conv->setPaddingMode(nvinfer1::PaddingMode::kCAFFE_ROUND_DOWN);
68+
conv->setPaddingNd(padding);
69+
conv->setPostPadding(out_padding);
70+
conv->setDilationNd(dilation);
71+
conv->setNbGroups(groups);
72+
new_layer = conv;
73+
}
74+
new_layer->setName(util::node_info(n).c_str());
8175

82-
auto out = ctx->AssociateValueAndTensor(n->outputs()[0], new_layer->getOutput(0));
76+
auto out = ctx->AssociateValueAndTensor(n->outputs()[0], new_layer->getOutput(0));
8377

84-
LOG_DEBUG("Output tensor shape: " << out->getDimensions());
78+
LOG_DEBUG("Output tensor shape: " << out->getDimensions());
8579

86-
return true;
87-
}});
80+
return true;
81+
}
82+
83+
auto conv_registrations TRTORCH_UNUSED = RegisterNodeConversionPatterns()
84+
.pattern({
85+
R"SIG(aten::_convolution(Tensor input, Tensor weight,
86+
Tensor? bias, int[] stride, int[] padding,
87+
int[] dilation, bool transposed,
88+
int[] output_padding, int groups, bool benchmark,
89+
bool deterministic, bool cudnn_enabled, bool allow_tf32) -> (Tensor))SIG",
90+
[](ConversionCtx* ctx, const torch::jit::Node* n, args& args) -> bool {
91+
return add_conv_deconv(ctx, n, args);
92+
}})
93+
.pattern({
94+
R"SIG(aten::_convolution.deprecated(Tensor input, Tensor weight,
95+
Tensor? bias, int[] stride, int[] padding,
96+
int[] dilation, bool transposed,
97+
int[] output_padding, int groups, bool benchmark,
98+
bool deterministic, bool cudnn_enabled) -> (Tensor))SIG",
99+
[](ConversionCtx* ctx, const torch::jit::Node* n, args& args) -> bool {
100+
// This pattern is only matched for traced JIT models which do not
101+
// have allow_tf32 bool in the function signature. The TRT conversion
102+
// code is exactly same as the above call.
103+
return add_conv_deconv(ctx, n, args);
104+
}});
88105
} // namespace
89106
} // namespace impl
90107
} // namespace converters

‎core/conversion/converters/impl/interpolate.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -77,7 +77,7 @@ void resize_layer_size(
7777
auto interpolate_registrations TRTORCH_UNUSED =
7878
RegisterNodeConversionPatterns()
7979
.pattern(
80-
{"aten::upsample_nearest1d(Tensor self, int[1] output_size, float? scales=None) -> (Tensor)",
80+
{"aten::upsample_nearest1d.vec(Tensor self, int[] output_size, float? scales=None) -> (Tensor)",
8181
[](ConversionCtx* ctx, const torch::jit::Node* n, args& args) -> bool {
8282
auto in = args[0].ITensor();
8383
auto in_shape = util::toVec(in->getDimensions());
@@ -154,7 +154,7 @@ auto interpolate_registrations TRTORCH_UNUSED =
154154
return true;
155155
}})
156156
.pattern(
157-
{"aten::upsample_linear1d(Tensor self, int[1] output_size, bool align_corners, float? scales=None) -> (Tensor)",
157+
{"aten::upsample_linear1d.vec(Tensor self, int[] output_size, bool align_corners, float[]? scales) -> (Tensor)",
158158
[](ConversionCtx* ctx, const torch::jit::Node* n, args& args) -> bool {
159159
auto in = args[0].ITensor();
160160
auto in_shape = util::toVec(in->getDimensions());

‎core/lowering/lowering.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,7 @@
88
#include "torch/csrc/jit/passes/lower_graph.h"
99
#include "torch/csrc/jit/passes/lower_tuples.h"
1010
#include "torch/csrc/jit/passes/peephole.h"
11+
#include "torch/csrc/jit/passes/remove_mutation.h"
1112

1213
#include "core/lowering/lowering.h"
1314
#include "core/lowering/passes/passes.h"

‎core/lowering/passes/conv2d_to_convolution.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@ void Conv2DToConvolution(std::shared_ptr<torch::jit::Graph>& graph) {
1616
graph(%x, %w, %b, %s, %p, %d, %g):
1717
%1 : bool = prim::Constant[value=0]()
1818
%2 : int[] = prim::Constant[value=[0, 0]]()
19-
%4 : Tensor = aten::_convolution(%x, %w, %b, %s, %p, %d, %1, %2, %g, %1, %1, %1)
19+
%4 : Tensor = aten::_convolution(%x, %w, %b, %s, %p, %d, %1, %2, %g, %1, %1, %1, %1)
2020
return (%4))IR";
2121
;
2222

‎core/lowering/passes/conv3d_to_convolution.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@ void Conv3DToConvolution(std::shared_ptr<torch::jit::Graph>& graph) {
1616
graph(%x, %w, %b, %s, %p, %d, %g):
1717
%1 : bool = prim::Constant[value=0]()
1818
%2 : int[] = prim::Constant[value=[0, 0, 0]]()
19-
%4 : Tensor = aten::_convolution(%x, %w, %b, %s, %p, %d, %1, %2, %g, %1, %1, %1)
19+
%4 : Tensor = aten::_convolution(%x, %w, %b, %s, %p, %d, %1, %2, %g, %1, %1, %1, %1)
2020
return (%4))IR";
2121
;
2222

‎core/lowering/register_trt_placeholder_ops.cpp

Lines changed: 1 addition & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -10,12 +10,7 @@ c10::AliasAnalysisKind aliasAnalysisFromSchema() {
1010
RegisterOperators trt_placeholder_ops_reg({
1111
/// Op marks a Tensor to be conveted from an Torch Tensor
1212
/// to a TRT constant Tensor
13-
Operator(
14-
"trt::const(Tensor val) -> Tensor",
15-
[](Stack& stack) {
16-
return 0; // noop
17-
},
18-
aliasAnalysisFromSchema()),
13+
Operator("trt::const(Tensor val) -> Tensor", [](Stack* stack) {}, aliasAnalysisFromSchema()),
1914
});
2015

2116
} // namespace jit

0 commit comments

Comments
 (0)