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Add support for Corstone-320
Enable running Executorch on Corstone-320, with Arm Ethos-U85. Signed-off-by: Per Åstrand <[email protected]> Change-Id: I45daa23871119ecb33cdc4abee112adc9a829076
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3 files changed

+22
-10
lines changed

3 files changed

+22
-10
lines changed

examples/arm/executor_runner/CMakeLists.txt

Lines changed: 10 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,8 @@ if(NOT DEFINED ET_PTE_FILE_PATH AND NOT ${SEMIHOSTING})
1616
)
1717
endif()
1818

19+
set(TARGET_BOARD "corstone-300" CACHE STRING "Target board")
20+
1921
# Example ExecuTorch demo for bare metal Cortex-M based systems
2022
set(ET_DIR_PATH
2123
"../../.."
@@ -55,10 +57,13 @@ endif()
5557
# libraries. We link against ethosu_target_init which includes all of these
5658
# dependencies.
5759

58-
# For Corstone-300 FVP builds we put models into the larger DRAM area
59-
set(MEMORY_MODEL "dram")
60-
set(MEMORY_ARENA "dram")
61-
add_subdirectory(${ETHOS_SDK_PATH}/core_platform/targets/corstone-300 target)
60+
if(TARGET_BOARD STREQUAL "corstone-300")
61+
add_subdirectory(${ETHOS_SDK_PATH}/core_platform/targets/corstone-300 target)
62+
elseif(TARGET_BOARD STREQUAL "corstone-320")
63+
add_subdirectory(${ETHOS_SDK_PATH}/core_platform/targets/corstone-320 target)
64+
else()
65+
message(FATAL_ERROR "Unsupported TARGET_BOARD: ${TARGET_BOARD}")
66+
endif()
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6368
# Dependencies from the ExecuTorch build
6469
add_library(executorch STATIC IMPORTED)
@@ -171,7 +176,7 @@ endif()
171176
if(SEMIHOSTING)
172177
# Remove this when MLBEDSW-8910 is closed.
173178
set_source_files_properties(
174-
${ETHOS_SDK_PATH}/core_platform/targets/corstone-300/retarget.c
179+
${ETHOS_SDK_PATH}/core_platform/targets/${TARGET_BOARD}/retarget.c
175180
PROPERTIES HEADER_FILE_ONLY TRUE
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)
177182
endif()

examples/arm/executor_runner/arm_executor_runner.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -26,11 +26,11 @@
2626
// In our unit test flow, we have the capability to provide an enitre model to
2727
// the Corstone-3xx FVP using semi hosting. Hence, the input allocation pool
2828
// needs to be large enough to take an entire model. On the FVP,
29-
// network_model_sec is linked to the DDR, which is large (256MB on
29+
// input_data_sec is linked to the DDR, which is large (256MB on
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// Corstone-300).
3131
const size_t input_allocation_pool_size = 100 * 1024 * 1024;
3232
unsigned char __attribute__((
33-
section("network_model_sec"),
33+
section("input_data_sec"),
3434
aligned(16))) input_allocation_pool[input_allocation_pool_size];
3535
// memory for the model will be allocated from the input_allocation_pool
3636
char* model_pte = nullptr;
@@ -65,12 +65,12 @@ using executorch::runtime::TensorInfo;
6565

6666
#define METHOD_ALLOCATOR_POOL_SIZE (70 * 1024 * 1024)
6767
unsigned char __attribute__((
68-
section("network_model_sec"),
68+
section("input_data_sec"),
6969
aligned(16))) method_allocation_pool[METHOD_ALLOCATOR_POOL_SIZE];
7070

7171
const size_t temp_allocation_pool_size = 1 * 1024 * 1024;
7272
unsigned char __attribute__((
73-
section("network_model_sec"),
73+
section("input_data_sec"),
7474
aligned(16))) temp_allocation_pool[temp_allocation_pool_size];
7575

7676
void et_pal_init(void) {}

examples/arm/executor_runner/arm_perf_monitor.cpp

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -38,11 +38,18 @@ void ethosu_inference_begin(struct ethosu_driver* drv, void*) {
3838
ETHOSU_PMU_PMCCNTR_CFG_Set_Stop_Event(drv, ETHOSU_PMU_NPU_IDLE);
3939
ETHOSU_PMU_PMCCNTR_CFG_Set_Start_Event(drv, ETHOSU_PMU_NPU_ACTIVE);
4040

41-
// Setup 4 counters
41+
// Setup 4 counters
42+
#if defined(ETHOSU55) || defined(ETHOSU65)
4243
ETHOSU_PMU_Set_EVTYPER(drv, 0, ETHOSU_PMU_AXI0_RD_DATA_BEAT_RECEIVED);
4344
ETHOSU_PMU_Set_EVTYPER(drv, 1, ETHOSU_PMU_AXI1_RD_DATA_BEAT_RECEIVED);
4445
ETHOSU_PMU_Set_EVTYPER(drv, 2, ETHOSU_PMU_AXI0_WR_DATA_BEAT_WRITTEN);
4546
ETHOSU_PMU_Set_EVTYPER(drv, 3, ETHOSU_PMU_NPU_IDLE);
47+
#elif defined(ETHOSU85)
48+
ETHOSU_PMU_Set_EVTYPER(drv, 0, ETHOSU_PMU_EXT0_RD_DATA_BEAT_RECEIVED);
49+
ETHOSU_PMU_Set_EVTYPER(drv, 1, ETHOSU_PMU_EXT1_RD_DATA_BEAT_RECEIVED);
50+
ETHOSU_PMU_Set_EVTYPER(drv, 2, ETHOSU_PMU_EXT0_WR_DATA_BEAT_WRITTEN);
51+
ETHOSU_PMU_Set_EVTYPER(drv, 3, ETHOSU_PMU_NPU_IDLE);
52+
#endif
4653
// Enable 4 counters
4754
ETHOSU_PMU_CNTR_Enable(drv, 0xf);
4855

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