add 8845 support

Differential Revision: D90288938

Pull Request resolved: #16500

Author: billmguo

backends/qualcomm/README.md

@@ -32,6 +32,7 @@ Please check `generate_qnn_executorch_compiler_spec()` in
 - QCS9100
 - SAR2230P
 - SW6100
+- SM8845
 
 ### Adding more supported Chipset
 Currently, users cannot add additional chipset models because the chipset ID is not accessible to community users. If you have specific chipset models you wish to add, please contact one of the authors in the `Code Reviews` section at the bottom of this page.

backends/qualcomm/serialization/qc_compiler_spec.fbs

@@ -51,6 +51,7 @@ enum QcomChipset: int {
   SA8255 = 52,
   SW6100 = 96,
   QCM6490 = 93,
+  SM8845 = 97,
 }
 
 /// Indicate the information of the specified SoC.

backends/qualcomm/serialization/qc_schema.py

@@ -57,6 +57,7 @@ class QcomChipset(IntEnum):
     SA8255 = 52  # v73
     SW6100 = 96  # v81
     QCM6490 = 93  # v68
+    SM8845 = 97  # v81
 
 
 @dataclass
@@ -84,6 +85,7 @@ class SocInfo:
     QcomChipset.SAR2230P: SocInfo(QcomChipset.SAR2230P, HtpInfo(HtpArch.V81, 4)),
     QcomChipset.SW6100: SocInfo(QcomChipset.SW6100, HtpInfo(HtpArch.V81, 4)),
     QcomChipset.QCM6490: SocInfo(QcomChipset.QCM6490, HtpInfo(HtpArch.V68, 2)),
+    QcomChipset.SM8845: SocInfo(QcomChipset.SM8845, HtpInfo(HtpArch.V81, 8)),
 }
 
 

backends/qualcomm/utils/utils.py

@@ -1146,6 +1146,7 @@ def get_soc_to_arch_map():
         "SAR2230P": HtpArch.V81,
         "SW6100": HtpArch.V81,
         "QCM6490": HtpArch.V68,
+        "SM8845": HtpArch.V81,
     }
 
 
@@ -1169,6 +1170,7 @@ def get_soc_to_chipset_map():
         "SAR2230P": QcomChipset.SAR2230P,
         "SW6100": QcomChipset.SW6100,
         "QCM6490": QcomChipset.QCM6490,
+        "SM8845": QcomChipset.SM8845,
     }