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benchmark all GA models
1 parent bba9d26 commit 389de0a

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12 files changed

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-11
lines changed

12 files changed

+2151
-11
lines changed

backends/qualcomm/serialization/qc_compiler_spec.fbs

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@@ -18,6 +18,7 @@ enum HtpArch: int {
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V73 = 73,
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V75 = 75,
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V79 = 79,
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V81 = 81,
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}
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table HtpInfo {
@@ -43,6 +44,8 @@ enum QcomChipset: int {
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SXR1230P = 45,
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SXR2230P = 53,
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SXR2330P = 75,
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SM8850 = 87,
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SM8735 = 85,
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}
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/// Indicate the information of the specified SoC.

backends/qualcomm/serialization/qc_schema.py

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@@ -27,6 +27,7 @@ class HtpArch(IntEnum):
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V73 = 73
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V75 = 75
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V79 = 79
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V81 = 81
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@dataclass
@@ -49,6 +50,8 @@ class QcomChipset(IntEnum):
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SXR1230P = 45 # v73
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SXR2230P = 53 # v69
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SXR2330P = 75 # v79
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SM8850 = 87, # v81
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SM8735 = 85, # v73
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@dataclass
@@ -69,6 +72,8 @@ class SocInfo:
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QcomChipset.SXR1230P: SocInfo(QcomChipset.SXR1230P, HtpInfo(HtpArch.V73, 2)),
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QcomChipset.SXR2230P: SocInfo(QcomChipset.SXR2230P, HtpInfo(HtpArch.V69, 8)),
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QcomChipset.SXR2330P: SocInfo(QcomChipset.SXR2330P, HtpInfo(HtpArch.V79, 8)),
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QcomChipset.SM8850: SocInfo(QcomChipset.SM8850, HtpInfo(HtpArch.V81, 8)),
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QcomChipset.SM8735: SocInfo(QcomChipset.SM8735, HtpInfo(HtpArch.V73, 8)),
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}
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backends/qualcomm/utils/utils.py

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@@ -1099,6 +1099,8 @@ def get_soc_to_arch_map():
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"SXR1230P": HtpArch.V73,
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"SXR2230P": HtpArch.V69,
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"SXR2330P": HtpArch.V79,
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"SM8850": HtpArch.V81,
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"SM8735": HtpArch.V73,
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}
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@@ -1115,6 +1117,8 @@ def get_soc_to_chipset_map():
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"SXR1230P": QcomChipset.SXR1230P,
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"SXR2230P": QcomChipset.SXR2230P,
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"SXR2330P": QcomChipset.SXR2330P,
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"SM8850": QcomChipset.SM8850,
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"SM8735": QcomChipset.SM8735,
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}
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