Update base for Update on "[ET-VK][Ops] linear_qta8a_qga4w_qta8o impl and shaders"

# Operator Description

The linear_qta8a_qga4w_qta8o operator implements a quantized linear transformation that enables efficient neural network inference through dynamic quantization. This operator performs matrix multiplication between quantized 8-bit activations and 4-bit grouped quantized weights, producing quantized 8-bit outputs.

The quantization scheme follows the standard affine mapping where `real_value = scale * (quantized_value - zero_point)`. Input activations use 8-bit signed integers with per-token scale and zero-point parameters, while weights employ 4-bit quantization with group-wise parameters.

# Implementation Architecture

The operator provides two distinct computational approaches optimized for different matrix multiplication scenarios: the TILED algorithm for general matrix-matrix multiplication (GEMM) and the COOPERATIVE algorithm for matrix-vector multiplication (GEMV).

## TILED Algorithm (GEMM Cases)

The tiled implementation processes the output matrix in rectangular blocks. Each thread is responsible for calculating a tile of output values, typically processing 3 rows and 2 columns worth of results in each iteration. The algorithm operates by having each thread load blocks of quantized weights and activations, perform integer arithmetic accumulation, and then apply the necessary scaling operations.

Weight data is pre-packed in a specialized format where two 4-bit values are stored in each byte. Each thread loads multiple weight elements simultaneously and unpacks them during computation. The quantization parameters for weights are organized by groups, where each group of consecutive weight elements shares the same scale and zero-point values.

## COOPERATIVE Algorithm (GEMV Cases)

The cooperative implementation uses shared memory and thread cooperation where this approach uses workgroups of 64 threads arranged as 8 groups of 8 workers each. The key insight is that GEMV operations have limited parallelism in the output dimension but substantial parallelism in the reduction dimension, making cooperative reduction strategies more effective than independent thread computation.

Each group of 8 worker threads collaboratively computes a portion of the output vector. The workers divide the reduction work along the input feature dimension, with each worker processing every 8th element in a strided pattern.

# Future Performance Improvements
- Making use of dotPacked4x8EXT (this requires upgrading glslc and vulkan)
- Fixed point math for pure integer operations
- Might be more performant to avoid preloading tensors
- Might also be more performant to avoid excessive register overhead by defining the ivec4 within each block operation (allowing more threads to be more register intensive)

Differential Revision: [D77173441](https://our.internmc.facebook.com/intern/diff/D77173441/)

[ghstack-poisoned]

Author: morelos

.ci/docker/ci_commit_pins/pytorch.txt

@@ -1 +1 @@
-7cda4017ddda554752e89069ae205be5e8388f59
+9b498d3bb28b8e3411ce464dd2755c5b96d92c8f

.ci/scripts/check_c10_sync.sh

@@ -12,4 +12,4 @@ pushd pytorch
 git checkout "$pytorch_pin"
 popd
 "$(dirname "${BASH_SOURCE[0]}")"/compare_dirs.sh runtime/core/portable_type/c10/c10 pytorch/c10
-"$(dirname "${BASH_SOURCE[0]}")"/compare_dirs.sh runtime/core/portable_type/c10/torch/headeronly pytorch/torch/headeronly
+"$(dirname "${BASH_SOURCE[0]}")"/compare_dirs.sh runtime/core/portable_type/c10/torch/standalone pytorch/torch/standalone

backends/arm/_passes/arm_pass_manager.py

@@ -6,6 +6,8 @@
 # LICENSE file in the root directory of this source tree.
 
 # pyre-unsafe
+
+import executorch.backends.arm.tosa.dialect  # noqa: unused
 from executorch.backends.arm._passes import (
     AddBiasPass,
     AnnotateChannelsLastDimOrder,

backends/arm/test/passes/test_decorate_fp32_to_int32_casting_pass.py

@@ -6,7 +6,7 @@
 from typing import Tuple
 
 import torch
-from executorch.backends.arm.test import common
+from executorch.backends.arm.test import common, conftest
 
 from executorch.backends.arm.test.tester.test_pipeline import (
     OpNotSupportedPipeline,
@@ -55,6 +55,7 @@ def test_decorate_fp32_to_int32_casting_tosa_MI(test_data: Tuple):
         (test_tensor,),
         aten_op=[],
         exir_op=[],
+        run_on_tosa_ref_model=conftest.is_option_enabled("tosa_ref_model"),
     )
     pipeline.run()
 

backends/cadence/fusion_g3/operators/op_exp.cpp

@@ -60,7 +60,7 @@ Tensor& exp_out(KernelRuntimeContext& ctx, const Tensor& in, Tensor& out) {
     return out;
   } else {
     return torch::executor::native::internal::
-        unary_ufunc_realhbbf16_to_floathbf16(std::exp, ctx, in, out);
+        unary_ufunc_realhbbf16_to_floathbf16(std::exp, std::exp, ctx, in, out);
   }
 }
 

backends/cadence/fusion_g3/operators/op_rsqrt.cpp

@@ -27,7 +27,8 @@ namespace native {
 
 namespace {
 
-double rsqrt(double x) {
+template <typename T>
+T rsqrt(T x) {
   return 1.0 / std::sqrt(x);
 }
 
@@ -61,11 +62,11 @@ Tensor& rsqrt_out(KernelRuntimeContext& ctx, const Tensor& in, Tensor& out) {
     return out;
   } else {
     return torch::executor::native::internal::
-        unary_ufunc_realhbbf16_to_floathbf16(rsqrt, ctx, in, out);
+        unary_ufunc_realhbbf16_to_floathbf16(rsqrt, rsqrt, ctx, in, out);
   }
 }
 
 } // namespace native
 } // namespace G3
 } // namespace impl
-} // namespace cadence
+} // namespace cadence

backends/cadence/fusion_g3/operators/op_sqrt.cpp

@@ -55,7 +55,8 @@ Tensor& sqrt_out(KernelRuntimeContext& ctx, const Tensor& in, Tensor& out) {
     return out;
   } else {
     return torch::executor::native::internal::
-        unary_ufunc_realhbbf16_to_floathbf16(std::sqrt, ctx, in, out);
+        unary_ufunc_realhbbf16_to_floathbf16(
+            std::sqrt, std::sqrt, ctx, in, out);
   }
 }
 

backends/cadence/fusion_g3/operators/op_tanh.cpp

@@ -55,7 +55,8 @@ Tensor& tanh_out(KernelRuntimeContext& ctx, const Tensor& in, Tensor& out) {
     return out;
   } else {
     return torch::executor::native::internal::
-        unary_ufunc_realhbbf16_to_floathbf16(std::tanh, ctx, in, out);
+        unary_ufunc_realhbbf16_to_floathbf16(
+            std::tanh, std::tanh, ctx, in, out);
   }
 }
 

backends/cadence/hifi/operators/op_rsqrt.cpp

@@ -21,7 +21,8 @@ namespace HiFi {
 namespace native {
 namespace {
 
-double rsqrt(double x) {
+template <typename T>
+T rsqrt(T x) {
   return 1.0 / std::sqrt(x);
 }
 
@@ -46,7 +47,7 @@ Tensor& rsqrt_out(RuntimeContext& ctx, const Tensor& in, Tensor& out) {
   }
 
   return torch::executor::native::internal::
-      unary_ufunc_realhbbf16_to_floathbf16(rsqrt, ctx, in, out);
+      unary_ufunc_realhbbf16_to_floathbf16(rsqrt, rsqrt, ctx, in, out);
 }
 
 } // namespace native

backends/cadence/hifi/operators/op_tanh.cpp

@@ -35,10 +35,10 @@ Tensor& tanh_out(RuntimeContext& ctx, const Tensor& in, Tensor& out) {
   }
 
   return torch::executor::native::internal::
-      unary_ufunc_realhbbf16_to_floathbf16(std::tanh, ctx, in, out);
+      unary_ufunc_realhbbf16_to_floathbf16(std::tanh, std::tanh, ctx, in, out);
 }
 
 } // namespace native
 } // namespace HiFi
 } // namespace impl
-} // namespace cadence
+} // namespace cadence