From 2a4deaafcbcbcf815dda5885b1958af97506ed3d Mon Sep 17 00:00:00 2001 From: John Scott Date: Wed, 6 Jan 2021 19:06:40 -0500 Subject: [PATCH 1/4] Add AppStream metadata file. A slightly different one was kept downstream in Debian, but this should be useful to other distros to, amongst other things, help users install the missing package upon insertion of the hardware. The AppStream specification only permits certain permissive licenses, because usually all packages' metadata needs to be aggregated together by distros. The FSF All-Permissive license is used, as BSD-3-Clause(-Clear) is not permitted by the specification. --- NOTICE.TXT | 3 + ...alcomm.qca.ath9k_htc.firmware.metainfo.xml | 58 +++++++++++++++++++ 2 files changed, 61 insertions(+) create mode 100644 com.qualcomm.qca.ath9k_htc.firmware.metainfo.xml diff --git a/NOTICE.TXT b/NOTICE.TXT index a8bf00e..58585c7 100644 --- a/NOTICE.TXT +++ b/NOTICE.TXT @@ -145,3 +145,6 @@ under the following licence: * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +The AppStream metadata file is subject to the copyright notice +and license terms that it specifies. diff --git a/com.qualcomm.qca.ath9k_htc.firmware.metainfo.xml b/com.qualcomm.qca.ath9k_htc.firmware.metainfo.xml new file mode 100644 index 0000000..86afd65 --- /dev/null +++ b/com.qualcomm.qca.ath9k_htc.firmware.metainfo.xml @@ -0,0 +1,58 @@ +# SPDX-FileCopyrightText: 2020 John Scott +# SPDX-License-Identifier: FSFAP +# +# Copying and distribution of this file, with or without modification, +# are permitted in any medium without royalty provided the copyright +# notice and this notice are preserved. This file is offered as-is, +# without any warranty. +# +# This file provides AppStream metadata and should be installed in +# /usr/share/metainfo/. + + + + com.qualcomm.qca.ath9k_htc.firmware + FSFAP + Open ath9k_htc firmware + Firmware for the Qualcomm Atheros AR7010 and AR9271 USB 802.11n NICs + + https://github.com/qca/open-ath9k-htc-firmware + https://github.com/qca/open-ath9k-htc-firmware/issues + mailto:ath9k_htc_fw@lists.infradead.org + jscott@posteo.net + + + ath9k_htc/htc_7010-1.4.0.fw + ath9k_htc/htc_9271-1.4.0.fw + + # /sbin/modinfo -Falias ath9k_htc | sort + usb:v040Dp3801d* + usb:v0411p017Fd* + usb:v0411p0197d* + usb:v0471p209Ed* + usb:v04CAp4605d* + usb:v04DAp3904d* + usb:v057Cp8403d* + usb:v07B8p9271d* + usb:v07D1p3A10d* + usb:v083ApA704d* + usb:v0846p9018d* + usb:v0846p9030d* + usb:v0930p0A08d* + usb:v0CF3p1006d* + usb:v0CF3p20FFd* + usb:v0CF3p7010d* + usb:v0CF3p7015d* + usb:v0CF3p9271d* + usb:v0CF3pB002d* + usb:v0CF3pB003d* + usb:v13D3p3327d* + usb:v13D3p3328d* + usb:v13D3p3346d* + usb:v13D3p3348d* + usb:v13D3p3349d* + usb:v13D3p3350d* + usb:v1668p1200d* + usb:v1EDAp2315d* + + From 942d70ffef7f78b10ab062bdc0b562ef4ddf11a0 Mon Sep 17 00:00:00 2001 From: John Scott Date: Wed, 6 Jan 2021 19:11:56 -0500 Subject: [PATCH 2/4] toolchain: Use GNU mirrors to download sources. --- Makefile | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/Makefile b/Makefile index de1e0f4..4cea5b5 100644 --- a/Makefile +++ b/Makefile @@ -1,30 +1,30 @@ GMP_VER=6.2.0 -GMP_URL=https://ftp.gnu.org/gnu/gmp/gmp-$(GMP_VER).tar.bz2 +GMP_URL=https://ftpmirror.gnu.org/gnu/gmp/gmp-$(GMP_VER).tar.bz2 GMP_TAR=gmp-$(GMP_VER).tar.bz2 GMP_DIR=gmp-$(GMP_VER) GMP_SUM=f51c99cb114deb21a60075ffb494c1a210eb9d7cb729ed042ddb7de9534451ea MPFR_VER=4.1.0 -MPFR_URL=https://ftp.gnu.org/gnu/mpfr/mpfr-$(MPFR_VER).tar.bz2 +MPFR_URL=https://ftpmirror.gnu.org/gnu/mpfr/mpfr-$(MPFR_VER).tar.bz2 MPFR_TAR=mpfr-$(MPFR_VER).tar.bz2 MPFR_DIR=mpfr-$(MPFR_VER) MPFR_SUM=feced2d430dd5a97805fa289fed3fc8ff2b094c02d05287fd6133e7f1f0ec926 MPC_VER=1.1.0 -MPC_URL=https://ftp.gnu.org/gnu/mpc/mpc-$(MPC_VER).tar.gz +MPC_URL=https://ftpmirror.gnu.org/gnu/mpc/mpc-$(MPC_VER).tar.gz MPC_TAR=mpc-$(MPC_VER).tar.gz MPC_DIR=mpc-$(MPC_VER) MPC_SUM=6985c538143c1208dcb1ac42cedad6ff52e267b47e5f970183a3e75125b43c2e BINUTILS_VER=2.35 -BINUTILS_URL=https://ftp.gnu.org/gnu/binutils/binutils-$(BINUTILS_VER).tar.bz2 +BINUTILS_URL=https://ftpmirror.gnu.org/gnu/binutils/binutils-$(BINUTILS_VER).tar.bz2 BINUTILS_TAR=binutils-$(BINUTILS_VER).tar.bz2 BINUTILS_DIR=binutils-$(BINUTILS_VER) BINUTILS_PATCHES=local/patches/binutils-2.34_fixup.patch local/patches/binutils.patch BINUTILS_SUM=7d24660f87093670738e58bcc7b7b06f121c0fcb0ca8fc44368d675a5ef9cff7 GCC_VER=10.2.0 -GCC_URL=https://ftp.gnu.org/gnu/gcc/gcc-$(GCC_VER)/gcc-$(GCC_VER).tar.gz +GCC_URL=https://ftpmirror.gnu.org/gnu/gcc/gcc-$(GCC_VER)/gcc-$(GCC_VER).tar.gz GCC_TAR=gcc-$(GCC_VER).tar.gz GCC_DIR=gcc-$(GCC_VER) GCC_PATCHES=local/patches/gcc.patch From f2fac6fd6a05db16135514474713d0ad4528de88 Mon Sep 17 00:00:00 2001 From: John Scott Date: Wed, 13 Jan 2021 16:18:58 -0500 Subject: [PATCH 3/4] Use proper XML comment for AppStream data. --- ...alcomm.qca.ath9k_htc.firmware.metainfo.xml | 26 ++++++++++--------- 1 file changed, 14 insertions(+), 12 deletions(-) diff --git a/com.qualcomm.qca.ath9k_htc.firmware.metainfo.xml b/com.qualcomm.qca.ath9k_htc.firmware.metainfo.xml index 86afd65..92a5727 100644 --- a/com.qualcomm.qca.ath9k_htc.firmware.metainfo.xml +++ b/com.qualcomm.qca.ath9k_htc.firmware.metainfo.xml @@ -1,15 +1,17 @@ -# SPDX-FileCopyrightText: 2020 John Scott -# SPDX-License-Identifier: FSFAP -# -# Copying and distribution of this file, with or without modification, -# are permitted in any medium without royalty provided the copyright -# notice and this notice are preserved. This file is offered as-is, -# without any warranty. -# -# This file provides AppStream metadata and should be installed in -# /usr/share/metainfo/. - + + com.qualcomm.qca.ath9k_htc.firmware FSFAP @@ -25,7 +27,7 @@ ath9k_htc/htc_7010-1.4.0.fw ath9k_htc/htc_9271-1.4.0.fw - # /sbin/modinfo -Falias ath9k_htc | sort + usb:v040Dp3801d* usb:v0411p017Fd* usb:v0411p0197d* From 9d829763d71ddd5d515855d5f362dde52522490e Mon Sep 17 00:00:00 2001 From: John Scott Date: Fri, 29 Jan 2021 15:15:24 -0500 Subject: [PATCH 4/4] Build with Binutils 2.36, with patch. The reverted commit only const qualifies all of the parameters, so it's simplest to just revert it. --- Makefile | 6 +- local/patches/binutils-2.36_fixup.patch | 2961 +++++++++++++++++++++++ 2 files changed, 2964 insertions(+), 3 deletions(-) create mode 100644 local/patches/binutils-2.36_fixup.patch diff --git a/Makefile b/Makefile index 4cea5b5..81ae465 100644 --- a/Makefile +++ b/Makefile @@ -16,12 +16,12 @@ MPC_TAR=mpc-$(MPC_VER).tar.gz MPC_DIR=mpc-$(MPC_VER) MPC_SUM=6985c538143c1208dcb1ac42cedad6ff52e267b47e5f970183a3e75125b43c2e -BINUTILS_VER=2.35 +BINUTILS_VER=2.36 BINUTILS_URL=https://ftpmirror.gnu.org/gnu/binutils/binutils-$(BINUTILS_VER).tar.bz2 BINUTILS_TAR=binutils-$(BINUTILS_VER).tar.bz2 BINUTILS_DIR=binutils-$(BINUTILS_VER) -BINUTILS_PATCHES=local/patches/binutils-2.34_fixup.patch local/patches/binutils.patch -BINUTILS_SUM=7d24660f87093670738e58bcc7b7b06f121c0fcb0ca8fc44368d675a5ef9cff7 +BINUTILS_PATCHES=local/patches/binutils-2.36_fixup.patch local/patches/binutils-2.34_fixup.patch local/patches/binutils.patch +BINUTILS_SUM=209ef690dc7ac28ca592daf7e87d6289222a61fb96104dd5d5e016133ed38e8d GCC_VER=10.2.0 GCC_URL=https://ftpmirror.gnu.org/gnu/gcc/gcc-$(GCC_VER)/gcc-$(GCC_VER).tar.gz diff --git a/local/patches/binutils-2.36_fixup.patch b/local/patches/binutils-2.36_fixup.patch new file mode 100644 index 0000000..d0fb9ca --- /dev/null +++ b/local/patches/binutils-2.36_fixup.patch @@ -0,0 +1,2961 @@ +From 81f490f9df4422386a2d0dce8cbb30cda638b434 Mon Sep 17 00:00:00 2001 +From: John Scott +Date: Fri, 29 Jan 2021 14:29:50 -0500 +Subject: [PATCH] Partially revert Xtensa constifification 61d2295 +--- + bfd/elf32-xtensa.c | 4 +- + bfd/xtensa-modules.c | 1100 ++++++++++++++++----------------- + include/xtensa-isa-internal.h | 30 +- + 3 files changed, 567 insertions(+), 567 deletions(-) + +diff --git a/bfd/elf32-xtensa.c b/bfd/elf32-xtensa.c +index 6338bc98e8..76e2610de7 100644 +--- a/bfd/elf32-xtensa.c ++++ b/bfd/elf32-xtensa.c +@@ -4341,7 +4341,7 @@ struct string_pair + const char *narrow; + }; + +-const struct string_pair narrowable[] = ++struct string_pair narrowable[] = + { + { "add", "add.n" }, + { "addi", "addi.n" }, +@@ -4354,7 +4354,7 @@ const struct string_pair narrowable[] = + { "or", "mov.n" } /* special case only when op1 == op2 */ + }; + +-const struct string_pair widenable[] = ++struct string_pair widenable[] = + { + { "add", "add.n" }, + { "addi", "addi.n" }, +diff --git a/bfd/xtensa-modules.c b/bfd/xtensa-modules.c +index 495fd7d201..796cf2ca27 100644 +--- a/bfd/xtensa-modules.c ++++ b/bfd/xtensa-modules.c +@@ -12852,2123 +12852,2123 @@ Opcode_bbs_w18_Slot_xt_flix64_slot3_encode (xtensa_insnbuf slotbuf) + slotbuf[1] = 0; + } + +-const xtensa_opcode_encode_fn Opcode_excw_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_excw_encode_fns[] = { + Opcode_excw_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rfe_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rfe_encode_fns[] = { + Opcode_rfe_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rfde_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rfde_encode_fns[] = { + Opcode_rfde_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_syscall_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_syscall_encode_fns[] = { + Opcode_syscall_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_simcall_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_simcall_encode_fns[] = { + Opcode_simcall_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_call12_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_call12_encode_fns[] = { + Opcode_call12_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_call8_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_call8_encode_fns[] = { + Opcode_call8_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_call4_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_call4_encode_fns[] = { + Opcode_call4_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_callx12_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_callx12_encode_fns[] = { + Opcode_callx12_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_callx8_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_callx8_encode_fns[] = { + Opcode_callx8_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_callx4_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_callx4_encode_fns[] = { + Opcode_callx4_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_entry_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_entry_encode_fns[] = { + Opcode_entry_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_movsp_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_movsp_encode_fns[] = { + Opcode_movsp_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rotw_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rotw_encode_fns[] = { + Opcode_rotw_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_retw_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_retw_encode_fns[] = { + Opcode_retw_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_retw_n_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_retw_n_encode_fns[] = { + 0, 0, Opcode_retw_n_Slot_inst16b_encode, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rfwo_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rfwo_encode_fns[] = { + Opcode_rfwo_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rfwu_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rfwu_encode_fns[] = { + Opcode_rfwu_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_l32e_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_l32e_encode_fns[] = { + Opcode_l32e_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_s32e_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_s32e_encode_fns[] = { + Opcode_s32e_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_windowbase_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_windowbase_encode_fns[] = { + Opcode_rsr_windowbase_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_windowbase_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_windowbase_encode_fns[] = { + Opcode_wsr_windowbase_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_windowbase_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_windowbase_encode_fns[] = { + Opcode_xsr_windowbase_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_windowstart_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_windowstart_encode_fns[] = { + Opcode_rsr_windowstart_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_windowstart_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_windowstart_encode_fns[] = { + Opcode_wsr_windowstart_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_windowstart_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_windowstart_encode_fns[] = { + Opcode_xsr_windowstart_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_add_n_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_add_n_encode_fns[] = { + 0, Opcode_add_n_Slot_inst16a_encode, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_addi_n_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_addi_n_encode_fns[] = { + 0, Opcode_addi_n_Slot_inst16a_encode, 0, 0, 0, 0, Opcode_addi_n_Slot_xt_flix64_slot2_encode, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_beqz_n_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_beqz_n_encode_fns[] = { + 0, 0, Opcode_beqz_n_Slot_inst16b_encode, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_bnez_n_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bnez_n_encode_fns[] = { + 0, 0, Opcode_bnez_n_Slot_inst16b_encode, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_ill_n_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_ill_n_encode_fns[] = { + 0, 0, Opcode_ill_n_Slot_inst16b_encode, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_l32i_n_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_l32i_n_encode_fns[] = { + 0, Opcode_l32i_n_Slot_inst16a_encode, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mov_n_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mov_n_encode_fns[] = { + 0, 0, Opcode_mov_n_Slot_inst16b_encode, Opcode_mov_n_Slot_xt_flix64_slot0_encode, Opcode_mov_n_Slot_xt_flix64_slot0_encode, Opcode_mov_n_Slot_xt_flix64_slot1_encode, Opcode_mov_n_Slot_xt_flix64_slot2_encode, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_movi_n_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_movi_n_encode_fns[] = { + 0, 0, Opcode_movi_n_Slot_inst16b_encode, 0, 0, 0, Opcode_movi_n_Slot_xt_flix64_slot2_encode, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_nop_n_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_nop_n_encode_fns[] = { + 0, 0, Opcode_nop_n_Slot_inst16b_encode, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_ret_n_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_ret_n_encode_fns[] = { + 0, 0, Opcode_ret_n_Slot_inst16b_encode, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_s32i_n_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_s32i_n_encode_fns[] = { + 0, Opcode_s32i_n_Slot_inst16a_encode, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rur_threadptr_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rur_threadptr_encode_fns[] = { + Opcode_rur_threadptr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wur_threadptr_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wur_threadptr_encode_fns[] = { + Opcode_wur_threadptr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_addi_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_addi_encode_fns[] = { + Opcode_addi_Slot_inst_encode, 0, 0, Opcode_addi_Slot_xt_flix64_slot0_encode, Opcode_addi_Slot_xt_flix64_slot0_encode, Opcode_addi_Slot_xt_flix64_slot1_encode, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_addmi_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_addmi_encode_fns[] = { + Opcode_addmi_Slot_inst_encode, 0, 0, Opcode_addmi_Slot_xt_flix64_slot0_encode, Opcode_addmi_Slot_xt_flix64_slot0_encode, Opcode_addmi_Slot_xt_flix64_slot1_encode, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_add_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_add_encode_fns[] = { + Opcode_add_Slot_inst_encode, 0, 0, Opcode_add_Slot_xt_flix64_slot0_encode, Opcode_add_Slot_xt_flix64_slot0_encode, Opcode_add_Slot_xt_flix64_slot1_encode, Opcode_add_Slot_xt_flix64_slot2_encode, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_sub_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_sub_encode_fns[] = { + Opcode_sub_Slot_inst_encode, 0, 0, Opcode_sub_Slot_xt_flix64_slot0_encode, Opcode_sub_Slot_xt_flix64_slot0_encode, Opcode_sub_Slot_xt_flix64_slot1_encode, Opcode_sub_Slot_xt_flix64_slot2_encode, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_addx2_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_addx2_encode_fns[] = { + Opcode_addx2_Slot_inst_encode, 0, 0, Opcode_addx2_Slot_xt_flix64_slot0_encode, Opcode_addx2_Slot_xt_flix64_slot0_encode, Opcode_addx2_Slot_xt_flix64_slot1_encode, Opcode_addx2_Slot_xt_flix64_slot2_encode, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_addx4_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_addx4_encode_fns[] = { + Opcode_addx4_Slot_inst_encode, 0, 0, Opcode_addx4_Slot_xt_flix64_slot0_encode, Opcode_addx4_Slot_xt_flix64_slot0_encode, Opcode_addx4_Slot_xt_flix64_slot1_encode, Opcode_addx4_Slot_xt_flix64_slot2_encode, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_addx8_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_addx8_encode_fns[] = { + Opcode_addx8_Slot_inst_encode, 0, 0, Opcode_addx8_Slot_xt_flix64_slot0_encode, Opcode_addx8_Slot_xt_flix64_slot0_encode, Opcode_addx8_Slot_xt_flix64_slot1_encode, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_subx2_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_subx2_encode_fns[] = { + Opcode_subx2_Slot_inst_encode, 0, 0, Opcode_subx2_Slot_xt_flix64_slot0_encode, Opcode_subx2_Slot_xt_flix64_slot0_encode, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_subx4_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_subx4_encode_fns[] = { + Opcode_subx4_Slot_inst_encode, 0, 0, Opcode_subx4_Slot_xt_flix64_slot0_encode, Opcode_subx4_Slot_xt_flix64_slot0_encode, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_subx8_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_subx8_encode_fns[] = { + Opcode_subx8_Slot_inst_encode, 0, 0, Opcode_subx8_Slot_xt_flix64_slot0_encode, Opcode_subx8_Slot_xt_flix64_slot0_encode, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_and_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_and_encode_fns[] = { + Opcode_and_Slot_inst_encode, 0, 0, Opcode_and_Slot_xt_flix64_slot0_encode, Opcode_and_Slot_xt_flix64_slot0_encode, Opcode_and_Slot_xt_flix64_slot1_encode, Opcode_and_Slot_xt_flix64_slot2_encode, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_or_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_or_encode_fns[] = { + Opcode_or_Slot_inst_encode, 0, 0, Opcode_or_Slot_xt_flix64_slot0_encode, Opcode_or_Slot_xt_flix64_slot0_encode, Opcode_or_Slot_xt_flix64_slot1_encode, Opcode_or_Slot_xt_flix64_slot2_encode, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xor_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xor_encode_fns[] = { + Opcode_xor_Slot_inst_encode, 0, 0, Opcode_xor_Slot_xt_flix64_slot0_encode, Opcode_xor_Slot_xt_flix64_slot0_encode, Opcode_xor_Slot_xt_flix64_slot1_encode, Opcode_xor_Slot_xt_flix64_slot2_encode, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_beqi_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_beqi_encode_fns[] = { + Opcode_beqi_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_bnei_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bnei_encode_fns[] = { + Opcode_bnei_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_bgei_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bgei_encode_fns[] = { + Opcode_bgei_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_blti_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_blti_encode_fns[] = { + Opcode_blti_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_bbci_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bbci_encode_fns[] = { + Opcode_bbci_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_bbsi_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bbsi_encode_fns[] = { + Opcode_bbsi_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_bgeui_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bgeui_encode_fns[] = { + Opcode_bgeui_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_bltui_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bltui_encode_fns[] = { + Opcode_bltui_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_beq_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_beq_encode_fns[] = { + Opcode_beq_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_bne_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bne_encode_fns[] = { + Opcode_bne_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_bge_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bge_encode_fns[] = { + Opcode_bge_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_blt_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_blt_encode_fns[] = { + Opcode_blt_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_bgeu_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bgeu_encode_fns[] = { + Opcode_bgeu_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_bltu_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bltu_encode_fns[] = { + Opcode_bltu_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_bany_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bany_encode_fns[] = { + Opcode_bany_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_bnone_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bnone_encode_fns[] = { + Opcode_bnone_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_ball_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_ball_encode_fns[] = { + Opcode_ball_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_bnall_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bnall_encode_fns[] = { + Opcode_bnall_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_bbc_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bbc_encode_fns[] = { + Opcode_bbc_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_bbs_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bbs_encode_fns[] = { + Opcode_bbs_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_beqz_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_beqz_encode_fns[] = { + Opcode_beqz_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_bnez_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bnez_encode_fns[] = { + Opcode_bnez_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_bgez_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bgez_encode_fns[] = { + Opcode_bgez_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_bltz_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bltz_encode_fns[] = { + Opcode_bltz_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_call0_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_call0_encode_fns[] = { + Opcode_call0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_callx0_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_callx0_encode_fns[] = { + Opcode_callx0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_extui_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_extui_encode_fns[] = { + Opcode_extui_Slot_inst_encode, 0, 0, Opcode_extui_Slot_xt_flix64_slot0_encode, Opcode_extui_Slot_xt_flix64_slot0_encode, Opcode_extui_Slot_xt_flix64_slot1_encode, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_ill_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_ill_encode_fns[] = { + Opcode_ill_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_j_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_j_encode_fns[] = { + Opcode_j_Slot_inst_encode, 0, 0, 0, 0, Opcode_j_Slot_xt_flix64_slot1_encode, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_jx_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_jx_encode_fns[] = { + Opcode_jx_Slot_inst_encode, 0, 0, 0, 0, Opcode_jx_Slot_xt_flix64_slot1_encode, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_l16ui_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_l16ui_encode_fns[] = { + Opcode_l16ui_Slot_inst_encode, 0, 0, Opcode_l16ui_Slot_xt_flix64_slot0_encode, Opcode_l16ui_Slot_xt_flix64_slot0_encode, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_l16si_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_l16si_encode_fns[] = { + Opcode_l16si_Slot_inst_encode, 0, 0, Opcode_l16si_Slot_xt_flix64_slot0_encode, Opcode_l16si_Slot_xt_flix64_slot0_encode, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_l32i_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_l32i_encode_fns[] = { + Opcode_l32i_Slot_inst_encode, 0, 0, Opcode_l32i_Slot_xt_flix64_slot0_encode, Opcode_l32i_Slot_xt_flix64_slot0_encode, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_l32r_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_l32r_encode_fns[] = { + Opcode_l32r_Slot_inst_encode, 0, 0, Opcode_l32r_Slot_xt_flix64_slot0_encode, Opcode_l32r_Slot_xt_flix64_slot0_encode, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_l8ui_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_l8ui_encode_fns[] = { + Opcode_l8ui_Slot_inst_encode, 0, 0, Opcode_l8ui_Slot_xt_flix64_slot0_encode, Opcode_l8ui_Slot_xt_flix64_slot0_encode, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_loop_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_loop_encode_fns[] = { + Opcode_loop_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_loopnez_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_loopnez_encode_fns[] = { + Opcode_loopnez_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_loopgtz_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_loopgtz_encode_fns[] = { + Opcode_loopgtz_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_movi_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_movi_encode_fns[] = { + Opcode_movi_Slot_inst_encode, 0, 0, Opcode_movi_Slot_xt_flix64_slot0_encode, Opcode_movi_Slot_xt_flix64_slot0_encode, Opcode_movi_Slot_xt_flix64_slot1_encode, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_moveqz_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_moveqz_encode_fns[] = { + Opcode_moveqz_Slot_inst_encode, 0, 0, Opcode_moveqz_Slot_xt_flix64_slot0_encode, Opcode_moveqz_Slot_xt_flix64_slot0_encode, Opcode_moveqz_Slot_xt_flix64_slot1_encode, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_movnez_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_movnez_encode_fns[] = { + Opcode_movnez_Slot_inst_encode, 0, 0, Opcode_movnez_Slot_xt_flix64_slot0_encode, Opcode_movnez_Slot_xt_flix64_slot0_encode, Opcode_movnez_Slot_xt_flix64_slot1_encode, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_movltz_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_movltz_encode_fns[] = { + Opcode_movltz_Slot_inst_encode, 0, 0, Opcode_movltz_Slot_xt_flix64_slot0_encode, Opcode_movltz_Slot_xt_flix64_slot0_encode, Opcode_movltz_Slot_xt_flix64_slot1_encode, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_movgez_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_movgez_encode_fns[] = { + Opcode_movgez_Slot_inst_encode, 0, 0, Opcode_movgez_Slot_xt_flix64_slot0_encode, Opcode_movgez_Slot_xt_flix64_slot0_encode, Opcode_movgez_Slot_xt_flix64_slot1_encode, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_neg_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_neg_encode_fns[] = { + Opcode_neg_Slot_inst_encode, 0, 0, Opcode_neg_Slot_xt_flix64_slot0_encode, Opcode_neg_Slot_xt_flix64_slot0_encode, Opcode_neg_Slot_xt_flix64_slot1_encode, Opcode_neg_Slot_xt_flix64_slot2_encode, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_abs_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_abs_encode_fns[] = { + Opcode_abs_Slot_inst_encode, 0, 0, Opcode_abs_Slot_xt_flix64_slot0_encode, Opcode_abs_Slot_xt_flix64_slot0_encode, 0, Opcode_abs_Slot_xt_flix64_slot2_encode, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_nop_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_nop_encode_fns[] = { + Opcode_nop_Slot_inst_encode, 0, 0, Opcode_nop_Slot_xt_flix64_slot0_encode, Opcode_nop_Slot_xt_flix64_slot0_encode, Opcode_nop_Slot_xt_flix64_slot1_encode, Opcode_nop_Slot_xt_flix64_slot2_encode, Opcode_nop_Slot_xt_flix64_slot3_encode + }; + +-const xtensa_opcode_encode_fn Opcode_ret_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_ret_encode_fns[] = { + Opcode_ret_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_s16i_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_s16i_encode_fns[] = { + Opcode_s16i_Slot_inst_encode, 0, 0, Opcode_s16i_Slot_xt_flix64_slot0_encode, Opcode_s16i_Slot_xt_flix64_slot0_encode, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_s32i_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_s32i_encode_fns[] = { + Opcode_s32i_Slot_inst_encode, 0, 0, Opcode_s32i_Slot_xt_flix64_slot0_encode, Opcode_s32i_Slot_xt_flix64_slot0_encode, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_s8i_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_s8i_encode_fns[] = { + Opcode_s8i_Slot_inst_encode, 0, 0, Opcode_s8i_Slot_xt_flix64_slot0_encode, Opcode_s8i_Slot_xt_flix64_slot0_encode, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_ssr_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_ssr_encode_fns[] = { + Opcode_ssr_Slot_inst_encode, 0, 0, Opcode_ssr_Slot_xt_flix64_slot0_encode, Opcode_ssr_Slot_xt_flix64_slot0_encode, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_ssl_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_ssl_encode_fns[] = { + Opcode_ssl_Slot_inst_encode, 0, 0, Opcode_ssl_Slot_xt_flix64_slot0_encode, Opcode_ssl_Slot_xt_flix64_slot0_encode, Opcode_ssl_Slot_xt_flix64_slot1_encode, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_ssa8l_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_ssa8l_encode_fns[] = { + Opcode_ssa8l_Slot_inst_encode, 0, 0, Opcode_ssa8l_Slot_xt_flix64_slot0_encode, Opcode_ssa8l_Slot_xt_flix64_slot0_encode, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_ssa8b_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_ssa8b_encode_fns[] = { + Opcode_ssa8b_Slot_inst_encode, 0, 0, Opcode_ssa8b_Slot_xt_flix64_slot0_encode, Opcode_ssa8b_Slot_xt_flix64_slot0_encode, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_ssai_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_ssai_encode_fns[] = { + Opcode_ssai_Slot_inst_encode, 0, 0, Opcode_ssai_Slot_xt_flix64_slot0_encode, Opcode_ssai_Slot_xt_flix64_slot0_encode, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_sll_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_sll_encode_fns[] = { + Opcode_sll_Slot_inst_encode, 0, 0, Opcode_sll_Slot_xt_flix64_slot0_encode, Opcode_sll_Slot_xt_flix64_slot0_encode, Opcode_sll_Slot_xt_flix64_slot1_encode, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_src_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_src_encode_fns[] = { + Opcode_src_Slot_inst_encode, 0, 0, Opcode_src_Slot_xt_flix64_slot0_encode, Opcode_src_Slot_xt_flix64_slot0_encode, Opcode_src_Slot_xt_flix64_slot1_encode, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_srl_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_srl_encode_fns[] = { + Opcode_srl_Slot_inst_encode, 0, 0, Opcode_srl_Slot_xt_flix64_slot0_encode, Opcode_srl_Slot_xt_flix64_slot0_encode, Opcode_srl_Slot_xt_flix64_slot1_encode, Opcode_srl_Slot_xt_flix64_slot2_encode, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_sra_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_sra_encode_fns[] = { + Opcode_sra_Slot_inst_encode, 0, 0, Opcode_sra_Slot_xt_flix64_slot0_encode, Opcode_sra_Slot_xt_flix64_slot0_encode, Opcode_sra_Slot_xt_flix64_slot1_encode, Opcode_sra_Slot_xt_flix64_slot2_encode, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_slli_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_slli_encode_fns[] = { + Opcode_slli_Slot_inst_encode, 0, 0, Opcode_slli_Slot_xt_flix64_slot0_encode, Opcode_slli_Slot_xt_flix64_slot0_encode, Opcode_slli_Slot_xt_flix64_slot1_encode, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_srai_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_srai_encode_fns[] = { + Opcode_srai_Slot_inst_encode, 0, 0, Opcode_srai_Slot_xt_flix64_slot0_encode, Opcode_srai_Slot_xt_flix64_slot0_encode, Opcode_srai_Slot_xt_flix64_slot1_encode, Opcode_srai_Slot_xt_flix64_slot2_encode, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_srli_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_srli_encode_fns[] = { + Opcode_srli_Slot_inst_encode, 0, 0, Opcode_srli_Slot_xt_flix64_slot0_encode, Opcode_srli_Slot_xt_flix64_slot0_encode, Opcode_srli_Slot_xt_flix64_slot1_encode, Opcode_srli_Slot_xt_flix64_slot2_encode, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_memw_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_memw_encode_fns[] = { + Opcode_memw_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_extw_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_extw_encode_fns[] = { + Opcode_extw_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_isync_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_isync_encode_fns[] = { + Opcode_isync_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsync_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsync_encode_fns[] = { + Opcode_rsync_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_esync_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_esync_encode_fns[] = { + Opcode_esync_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_dsync_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_dsync_encode_fns[] = { + Opcode_dsync_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsil_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsil_encode_fns[] = { + Opcode_rsil_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_lend_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_lend_encode_fns[] = { + Opcode_rsr_lend_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_lend_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_lend_encode_fns[] = { + Opcode_wsr_lend_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_lend_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_lend_encode_fns[] = { + Opcode_xsr_lend_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_lcount_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_lcount_encode_fns[] = { + Opcode_rsr_lcount_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_lcount_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_lcount_encode_fns[] = { + Opcode_wsr_lcount_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_lcount_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_lcount_encode_fns[] = { + Opcode_xsr_lcount_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_lbeg_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_lbeg_encode_fns[] = { + Opcode_rsr_lbeg_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_lbeg_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_lbeg_encode_fns[] = { + Opcode_wsr_lbeg_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_lbeg_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_lbeg_encode_fns[] = { + Opcode_xsr_lbeg_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_sar_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_sar_encode_fns[] = { + Opcode_rsr_sar_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_sar_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_sar_encode_fns[] = { + Opcode_wsr_sar_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_sar_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_sar_encode_fns[] = { + Opcode_xsr_sar_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_litbase_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_litbase_encode_fns[] = { + Opcode_rsr_litbase_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_litbase_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_litbase_encode_fns[] = { + Opcode_wsr_litbase_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_litbase_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_litbase_encode_fns[] = { + Opcode_xsr_litbase_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_176_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_176_encode_fns[] = { + Opcode_rsr_176_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_208_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_208_encode_fns[] = { + Opcode_rsr_208_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_ps_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_ps_encode_fns[] = { + Opcode_rsr_ps_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_ps_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_ps_encode_fns[] = { + Opcode_wsr_ps_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_ps_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_ps_encode_fns[] = { + Opcode_xsr_ps_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_epc1_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_epc1_encode_fns[] = { + Opcode_rsr_epc1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_epc1_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_epc1_encode_fns[] = { + Opcode_wsr_epc1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_epc1_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_epc1_encode_fns[] = { + Opcode_xsr_epc1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_excsave1_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_excsave1_encode_fns[] = { + Opcode_rsr_excsave1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_excsave1_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_excsave1_encode_fns[] = { + Opcode_wsr_excsave1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_excsave1_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_excsave1_encode_fns[] = { + Opcode_xsr_excsave1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_epc2_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_epc2_encode_fns[] = { + Opcode_rsr_epc2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_epc2_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_epc2_encode_fns[] = { + Opcode_wsr_epc2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_epc2_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_epc2_encode_fns[] = { + Opcode_xsr_epc2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_excsave2_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_excsave2_encode_fns[] = { + Opcode_rsr_excsave2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_excsave2_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_excsave2_encode_fns[] = { + Opcode_wsr_excsave2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_excsave2_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_excsave2_encode_fns[] = { + Opcode_xsr_excsave2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_epc3_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_epc3_encode_fns[] = { + Opcode_rsr_epc3_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_epc3_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_epc3_encode_fns[] = { + Opcode_wsr_epc3_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_epc3_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_epc3_encode_fns[] = { + Opcode_xsr_epc3_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_excsave3_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_excsave3_encode_fns[] = { + Opcode_rsr_excsave3_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_excsave3_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_excsave3_encode_fns[] = { + Opcode_wsr_excsave3_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_excsave3_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_excsave3_encode_fns[] = { + Opcode_xsr_excsave3_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_epc4_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_epc4_encode_fns[] = { + Opcode_rsr_epc4_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_epc4_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_epc4_encode_fns[] = { + Opcode_wsr_epc4_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_epc4_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_epc4_encode_fns[] = { + Opcode_xsr_epc4_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_excsave4_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_excsave4_encode_fns[] = { + Opcode_rsr_excsave4_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_excsave4_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_excsave4_encode_fns[] = { + Opcode_wsr_excsave4_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_excsave4_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_excsave4_encode_fns[] = { + Opcode_xsr_excsave4_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_epc5_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_epc5_encode_fns[] = { + Opcode_rsr_epc5_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_epc5_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_epc5_encode_fns[] = { + Opcode_wsr_epc5_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_epc5_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_epc5_encode_fns[] = { + Opcode_xsr_epc5_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_excsave5_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_excsave5_encode_fns[] = { + Opcode_rsr_excsave5_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_excsave5_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_excsave5_encode_fns[] = { + Opcode_wsr_excsave5_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_excsave5_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_excsave5_encode_fns[] = { + Opcode_xsr_excsave5_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_epc6_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_epc6_encode_fns[] = { + Opcode_rsr_epc6_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_epc6_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_epc6_encode_fns[] = { + Opcode_wsr_epc6_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_epc6_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_epc6_encode_fns[] = { + Opcode_xsr_epc6_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_excsave6_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_excsave6_encode_fns[] = { + Opcode_rsr_excsave6_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_excsave6_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_excsave6_encode_fns[] = { + Opcode_wsr_excsave6_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_excsave6_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_excsave6_encode_fns[] = { + Opcode_xsr_excsave6_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_epc7_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_epc7_encode_fns[] = { + Opcode_rsr_epc7_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_epc7_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_epc7_encode_fns[] = { + Opcode_wsr_epc7_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_epc7_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_epc7_encode_fns[] = { + Opcode_xsr_epc7_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_excsave7_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_excsave7_encode_fns[] = { + Opcode_rsr_excsave7_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_excsave7_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_excsave7_encode_fns[] = { + Opcode_wsr_excsave7_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_excsave7_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_excsave7_encode_fns[] = { + Opcode_xsr_excsave7_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_eps2_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_eps2_encode_fns[] = { + Opcode_rsr_eps2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_eps2_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_eps2_encode_fns[] = { + Opcode_wsr_eps2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_eps2_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_eps2_encode_fns[] = { + Opcode_xsr_eps2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_eps3_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_eps3_encode_fns[] = { + Opcode_rsr_eps3_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_eps3_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_eps3_encode_fns[] = { + Opcode_wsr_eps3_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_eps3_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_eps3_encode_fns[] = { + Opcode_xsr_eps3_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_eps4_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_eps4_encode_fns[] = { + Opcode_rsr_eps4_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_eps4_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_eps4_encode_fns[] = { + Opcode_wsr_eps4_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_eps4_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_eps4_encode_fns[] = { + Opcode_xsr_eps4_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_eps5_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_eps5_encode_fns[] = { + Opcode_rsr_eps5_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_eps5_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_eps5_encode_fns[] = { + Opcode_wsr_eps5_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_eps5_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_eps5_encode_fns[] = { + Opcode_xsr_eps5_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_eps6_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_eps6_encode_fns[] = { + Opcode_rsr_eps6_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_eps6_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_eps6_encode_fns[] = { + Opcode_wsr_eps6_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_eps6_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_eps6_encode_fns[] = { + Opcode_xsr_eps6_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_eps7_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_eps7_encode_fns[] = { + Opcode_rsr_eps7_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_eps7_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_eps7_encode_fns[] = { + Opcode_wsr_eps7_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_eps7_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_eps7_encode_fns[] = { + Opcode_xsr_eps7_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_excvaddr_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_excvaddr_encode_fns[] = { + Opcode_rsr_excvaddr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_excvaddr_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_excvaddr_encode_fns[] = { + Opcode_wsr_excvaddr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_excvaddr_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_excvaddr_encode_fns[] = { + Opcode_xsr_excvaddr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_depc_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_depc_encode_fns[] = { + Opcode_rsr_depc_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_depc_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_depc_encode_fns[] = { + Opcode_wsr_depc_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_depc_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_depc_encode_fns[] = { + Opcode_xsr_depc_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_exccause_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_exccause_encode_fns[] = { + Opcode_rsr_exccause_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_exccause_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_exccause_encode_fns[] = { + Opcode_wsr_exccause_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_exccause_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_exccause_encode_fns[] = { + Opcode_xsr_exccause_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_misc0_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_misc0_encode_fns[] = { + Opcode_rsr_misc0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_misc0_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_misc0_encode_fns[] = { + Opcode_wsr_misc0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_misc0_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_misc0_encode_fns[] = { + Opcode_xsr_misc0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_misc1_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_misc1_encode_fns[] = { + Opcode_rsr_misc1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_misc1_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_misc1_encode_fns[] = { + Opcode_wsr_misc1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_misc1_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_misc1_encode_fns[] = { + Opcode_xsr_misc1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_misc2_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_misc2_encode_fns[] = { + Opcode_rsr_misc2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_misc2_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_misc2_encode_fns[] = { + Opcode_wsr_misc2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_misc2_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_misc2_encode_fns[] = { + Opcode_xsr_misc2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_misc3_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_misc3_encode_fns[] = { + Opcode_rsr_misc3_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_misc3_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_misc3_encode_fns[] = { + Opcode_wsr_misc3_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_misc3_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_misc3_encode_fns[] = { + Opcode_xsr_misc3_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_prid_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_prid_encode_fns[] = { + Opcode_rsr_prid_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_vecbase_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_vecbase_encode_fns[] = { + Opcode_rsr_vecbase_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_vecbase_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_vecbase_encode_fns[] = { + Opcode_wsr_vecbase_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_vecbase_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_vecbase_encode_fns[] = { + Opcode_xsr_vecbase_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mul_aa_ll_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mul_aa_ll_encode_fns[] = { + Opcode_mul_aa_ll_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mul_aa_hl_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mul_aa_hl_encode_fns[] = { + Opcode_mul_aa_hl_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mul_aa_lh_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mul_aa_lh_encode_fns[] = { + Opcode_mul_aa_lh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mul_aa_hh_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mul_aa_hh_encode_fns[] = { + Opcode_mul_aa_hh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_umul_aa_ll_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_umul_aa_ll_encode_fns[] = { + Opcode_umul_aa_ll_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_umul_aa_hl_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_umul_aa_hl_encode_fns[] = { + Opcode_umul_aa_hl_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_umul_aa_lh_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_umul_aa_lh_encode_fns[] = { + Opcode_umul_aa_lh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_umul_aa_hh_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_umul_aa_hh_encode_fns[] = { + Opcode_umul_aa_hh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mul_ad_ll_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mul_ad_ll_encode_fns[] = { + Opcode_mul_ad_ll_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mul_ad_hl_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mul_ad_hl_encode_fns[] = { + Opcode_mul_ad_hl_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mul_ad_lh_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mul_ad_lh_encode_fns[] = { + Opcode_mul_ad_lh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mul_ad_hh_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mul_ad_hh_encode_fns[] = { + Opcode_mul_ad_hh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mul_da_ll_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mul_da_ll_encode_fns[] = { + Opcode_mul_da_ll_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mul_da_hl_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mul_da_hl_encode_fns[] = { + Opcode_mul_da_hl_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mul_da_lh_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mul_da_lh_encode_fns[] = { + Opcode_mul_da_lh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mul_da_hh_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mul_da_hh_encode_fns[] = { + Opcode_mul_da_hh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mul_dd_ll_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mul_dd_ll_encode_fns[] = { + Opcode_mul_dd_ll_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mul_dd_hl_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mul_dd_hl_encode_fns[] = { + Opcode_mul_dd_hl_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mul_dd_lh_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mul_dd_lh_encode_fns[] = { + Opcode_mul_dd_lh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mul_dd_hh_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mul_dd_hh_encode_fns[] = { + Opcode_mul_dd_hh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_aa_ll_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_aa_ll_encode_fns[] = { + Opcode_mula_aa_ll_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_aa_hl_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_aa_hl_encode_fns[] = { + Opcode_mula_aa_hl_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_aa_lh_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_aa_lh_encode_fns[] = { + Opcode_mula_aa_lh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_aa_hh_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_aa_hh_encode_fns[] = { + Opcode_mula_aa_hh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_muls_aa_ll_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_muls_aa_ll_encode_fns[] = { + Opcode_muls_aa_ll_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_muls_aa_hl_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_muls_aa_hl_encode_fns[] = { + Opcode_muls_aa_hl_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_muls_aa_lh_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_muls_aa_lh_encode_fns[] = { + Opcode_muls_aa_lh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_muls_aa_hh_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_muls_aa_hh_encode_fns[] = { + Opcode_muls_aa_hh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_ad_ll_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_ad_ll_encode_fns[] = { + Opcode_mula_ad_ll_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_ad_hl_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_ad_hl_encode_fns[] = { + Opcode_mula_ad_hl_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_ad_lh_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_ad_lh_encode_fns[] = { + Opcode_mula_ad_lh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_ad_hh_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_ad_hh_encode_fns[] = { + Opcode_mula_ad_hh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_muls_ad_ll_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_muls_ad_ll_encode_fns[] = { + Opcode_muls_ad_ll_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_muls_ad_hl_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_muls_ad_hl_encode_fns[] = { + Opcode_muls_ad_hl_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_muls_ad_lh_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_muls_ad_lh_encode_fns[] = { + Opcode_muls_ad_lh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_muls_ad_hh_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_muls_ad_hh_encode_fns[] = { + Opcode_muls_ad_hh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_da_ll_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_da_ll_encode_fns[] = { + Opcode_mula_da_ll_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_da_hl_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_da_hl_encode_fns[] = { + Opcode_mula_da_hl_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_da_lh_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_da_lh_encode_fns[] = { + Opcode_mula_da_lh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_da_hh_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_da_hh_encode_fns[] = { + Opcode_mula_da_hh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_muls_da_ll_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_muls_da_ll_encode_fns[] = { + Opcode_muls_da_ll_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_muls_da_hl_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_muls_da_hl_encode_fns[] = { + Opcode_muls_da_hl_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_muls_da_lh_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_muls_da_lh_encode_fns[] = { + Opcode_muls_da_lh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_muls_da_hh_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_muls_da_hh_encode_fns[] = { + Opcode_muls_da_hh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_dd_ll_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_dd_ll_encode_fns[] = { + Opcode_mula_dd_ll_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_dd_hl_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_dd_hl_encode_fns[] = { + Opcode_mula_dd_hl_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_dd_lh_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_dd_lh_encode_fns[] = { + Opcode_mula_dd_lh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_dd_hh_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_dd_hh_encode_fns[] = { + Opcode_mula_dd_hh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_muls_dd_ll_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_muls_dd_ll_encode_fns[] = { + Opcode_muls_dd_ll_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_muls_dd_hl_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_muls_dd_hl_encode_fns[] = { + Opcode_muls_dd_hl_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_muls_dd_lh_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_muls_dd_lh_encode_fns[] = { + Opcode_muls_dd_lh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_muls_dd_hh_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_muls_dd_hh_encode_fns[] = { + Opcode_muls_dd_hh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_da_ll_lddec_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_da_ll_lddec_encode_fns[] = { + Opcode_mula_da_ll_lddec_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_da_ll_ldinc_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_da_ll_ldinc_encode_fns[] = { + Opcode_mula_da_ll_ldinc_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_da_hl_lddec_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_da_hl_lddec_encode_fns[] = { + Opcode_mula_da_hl_lddec_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_da_hl_ldinc_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_da_hl_ldinc_encode_fns[] = { + Opcode_mula_da_hl_ldinc_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_da_lh_lddec_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_da_lh_lddec_encode_fns[] = { + Opcode_mula_da_lh_lddec_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_da_lh_ldinc_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_da_lh_ldinc_encode_fns[] = { + Opcode_mula_da_lh_ldinc_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_da_hh_lddec_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_da_hh_lddec_encode_fns[] = { + Opcode_mula_da_hh_lddec_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_da_hh_ldinc_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_da_hh_ldinc_encode_fns[] = { + Opcode_mula_da_hh_ldinc_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_dd_ll_lddec_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_dd_ll_lddec_encode_fns[] = { + Opcode_mula_dd_ll_lddec_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_dd_ll_ldinc_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_dd_ll_ldinc_encode_fns[] = { + Opcode_mula_dd_ll_ldinc_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_dd_hl_lddec_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_dd_hl_lddec_encode_fns[] = { + Opcode_mula_dd_hl_lddec_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_dd_hl_ldinc_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_dd_hl_ldinc_encode_fns[] = { + Opcode_mula_dd_hl_ldinc_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_dd_lh_lddec_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_dd_lh_lddec_encode_fns[] = { + Opcode_mula_dd_lh_lddec_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_dd_lh_ldinc_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_dd_lh_ldinc_encode_fns[] = { + Opcode_mula_dd_lh_ldinc_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_dd_hh_lddec_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_dd_hh_lddec_encode_fns[] = { + Opcode_mula_dd_hh_lddec_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mula_dd_hh_ldinc_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mula_dd_hh_ldinc_encode_fns[] = { + Opcode_mula_dd_hh_ldinc_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_lddec_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_lddec_encode_fns[] = { + Opcode_lddec_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_ldinc_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_ldinc_encode_fns[] = { + Opcode_ldinc_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mul16u_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mul16u_encode_fns[] = { + Opcode_mul16u_Slot_inst_encode, 0, 0, Opcode_mul16u_Slot_xt_flix64_slot0_encode, Opcode_mul16u_Slot_xt_flix64_slot0_encode, Opcode_mul16u_Slot_xt_flix64_slot1_encode, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mul16s_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mul16s_encode_fns[] = { + Opcode_mul16s_Slot_inst_encode, 0, 0, Opcode_mul16s_Slot_xt_flix64_slot0_encode, Opcode_mul16s_Slot_xt_flix64_slot0_encode, Opcode_mul16s_Slot_xt_flix64_slot1_encode, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_m0_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_m0_encode_fns[] = { + Opcode_rsr_m0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_m0_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_m0_encode_fns[] = { + Opcode_wsr_m0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_m0_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_m0_encode_fns[] = { + Opcode_xsr_m0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_m1_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_m1_encode_fns[] = { + Opcode_rsr_m1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_m1_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_m1_encode_fns[] = { + Opcode_wsr_m1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_m1_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_m1_encode_fns[] = { + Opcode_xsr_m1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_m2_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_m2_encode_fns[] = { + Opcode_rsr_m2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_m2_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_m2_encode_fns[] = { + Opcode_wsr_m2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_m2_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_m2_encode_fns[] = { + Opcode_xsr_m2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_m3_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_m3_encode_fns[] = { + Opcode_rsr_m3_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_m3_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_m3_encode_fns[] = { + Opcode_wsr_m3_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_m3_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_m3_encode_fns[] = { + Opcode_xsr_m3_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_acclo_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_acclo_encode_fns[] = { + Opcode_rsr_acclo_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_acclo_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_acclo_encode_fns[] = { + Opcode_wsr_acclo_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_acclo_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_acclo_encode_fns[] = { + Opcode_xsr_acclo_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_acchi_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_acchi_encode_fns[] = { + Opcode_rsr_acchi_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_acchi_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_acchi_encode_fns[] = { + Opcode_wsr_acchi_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_acchi_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_acchi_encode_fns[] = { + Opcode_xsr_acchi_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rfi_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rfi_encode_fns[] = { + Opcode_rfi_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_waiti_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_waiti_encode_fns[] = { + Opcode_waiti_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_interrupt_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_interrupt_encode_fns[] = { + Opcode_rsr_interrupt_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_intset_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_intset_encode_fns[] = { + Opcode_wsr_intset_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_intclear_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_intclear_encode_fns[] = { + Opcode_wsr_intclear_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_intenable_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_intenable_encode_fns[] = { + Opcode_rsr_intenable_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_intenable_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_intenable_encode_fns[] = { + Opcode_wsr_intenable_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_intenable_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_intenable_encode_fns[] = { + Opcode_xsr_intenable_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_break_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_break_encode_fns[] = { + Opcode_break_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_break_n_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_break_n_encode_fns[] = { + 0, 0, Opcode_break_n_Slot_inst16b_encode, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_dbreaka0_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_dbreaka0_encode_fns[] = { + Opcode_rsr_dbreaka0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_dbreaka0_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_dbreaka0_encode_fns[] = { + Opcode_wsr_dbreaka0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_dbreaka0_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_dbreaka0_encode_fns[] = { + Opcode_xsr_dbreaka0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_dbreakc0_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_dbreakc0_encode_fns[] = { + Opcode_rsr_dbreakc0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_dbreakc0_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_dbreakc0_encode_fns[] = { + Opcode_wsr_dbreakc0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_dbreakc0_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_dbreakc0_encode_fns[] = { + Opcode_xsr_dbreakc0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_dbreaka1_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_dbreaka1_encode_fns[] = { + Opcode_rsr_dbreaka1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_dbreaka1_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_dbreaka1_encode_fns[] = { + Opcode_wsr_dbreaka1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_dbreaka1_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_dbreaka1_encode_fns[] = { + Opcode_xsr_dbreaka1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_dbreakc1_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_dbreakc1_encode_fns[] = { + Opcode_rsr_dbreakc1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_dbreakc1_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_dbreakc1_encode_fns[] = { + Opcode_wsr_dbreakc1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_dbreakc1_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_dbreakc1_encode_fns[] = { + Opcode_xsr_dbreakc1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_ibreaka0_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_ibreaka0_encode_fns[] = { + Opcode_rsr_ibreaka0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_ibreaka0_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_ibreaka0_encode_fns[] = { + Opcode_wsr_ibreaka0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_ibreaka0_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_ibreaka0_encode_fns[] = { + Opcode_xsr_ibreaka0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_ibreaka1_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_ibreaka1_encode_fns[] = { + Opcode_rsr_ibreaka1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_ibreaka1_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_ibreaka1_encode_fns[] = { + Opcode_wsr_ibreaka1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_ibreaka1_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_ibreaka1_encode_fns[] = { + Opcode_xsr_ibreaka1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_ibreakenable_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_ibreakenable_encode_fns[] = { + Opcode_rsr_ibreakenable_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_ibreakenable_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_ibreakenable_encode_fns[] = { + Opcode_wsr_ibreakenable_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_ibreakenable_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_ibreakenable_encode_fns[] = { + Opcode_xsr_ibreakenable_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_debugcause_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_debugcause_encode_fns[] = { + Opcode_rsr_debugcause_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_debugcause_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_debugcause_encode_fns[] = { + Opcode_wsr_debugcause_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_debugcause_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_debugcause_encode_fns[] = { + Opcode_xsr_debugcause_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_icount_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_icount_encode_fns[] = { + Opcode_rsr_icount_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_icount_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_icount_encode_fns[] = { + Opcode_wsr_icount_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_icount_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_icount_encode_fns[] = { + Opcode_xsr_icount_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_icountlevel_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_icountlevel_encode_fns[] = { + Opcode_rsr_icountlevel_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_icountlevel_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_icountlevel_encode_fns[] = { + Opcode_wsr_icountlevel_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_icountlevel_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_icountlevel_encode_fns[] = { + Opcode_xsr_icountlevel_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_ddr_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_ddr_encode_fns[] = { + Opcode_rsr_ddr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_ddr_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_ddr_encode_fns[] = { + Opcode_wsr_ddr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_ddr_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_ddr_encode_fns[] = { + Opcode_xsr_ddr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rfdo_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rfdo_encode_fns[] = { + Opcode_rfdo_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rfdd_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rfdd_encode_fns[] = { + Opcode_rfdd_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_mmid_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_mmid_encode_fns[] = { + Opcode_wsr_mmid_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_andb_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_andb_encode_fns[] = { + Opcode_andb_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_andbc_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_andbc_encode_fns[] = { + Opcode_andbc_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_orb_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_orb_encode_fns[] = { + Opcode_orb_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_orbc_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_orbc_encode_fns[] = { + Opcode_orbc_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xorb_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xorb_encode_fns[] = { + Opcode_xorb_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_any4_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_any4_encode_fns[] = { + Opcode_any4_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_all4_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_all4_encode_fns[] = { + Opcode_all4_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_any8_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_any8_encode_fns[] = { + Opcode_any8_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_all8_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_all8_encode_fns[] = { + Opcode_all8_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_bf_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bf_encode_fns[] = { + Opcode_bf_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_bt_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bt_encode_fns[] = { + Opcode_bt_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_movf_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_movf_encode_fns[] = { + Opcode_movf_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_movt_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_movt_encode_fns[] = { + Opcode_movt_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_br_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_br_encode_fns[] = { + Opcode_rsr_br_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_br_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_br_encode_fns[] = { + Opcode_wsr_br_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_br_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_br_encode_fns[] = { + Opcode_xsr_br_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_ccount_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_ccount_encode_fns[] = { + Opcode_rsr_ccount_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_ccount_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_ccount_encode_fns[] = { + Opcode_wsr_ccount_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_ccount_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_ccount_encode_fns[] = { + Opcode_xsr_ccount_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_ccompare0_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_ccompare0_encode_fns[] = { + Opcode_rsr_ccompare0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_ccompare0_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_ccompare0_encode_fns[] = { + Opcode_wsr_ccompare0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_ccompare0_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_ccompare0_encode_fns[] = { + Opcode_xsr_ccompare0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_ccompare1_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_ccompare1_encode_fns[] = { + Opcode_rsr_ccompare1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_ccompare1_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_ccompare1_encode_fns[] = { + Opcode_wsr_ccompare1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_ccompare1_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_ccompare1_encode_fns[] = { + Opcode_xsr_ccompare1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_ccompare2_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_ccompare2_encode_fns[] = { + Opcode_rsr_ccompare2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_ccompare2_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_ccompare2_encode_fns[] = { + Opcode_wsr_ccompare2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_ccompare2_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_ccompare2_encode_fns[] = { + Opcode_xsr_ccompare2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_ipf_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_ipf_encode_fns[] = { + Opcode_ipf_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_ihi_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_ihi_encode_fns[] = { + Opcode_ihi_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_ipfl_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_ipfl_encode_fns[] = { + Opcode_ipfl_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_ihu_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_ihu_encode_fns[] = { + Opcode_ihu_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_iiu_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_iiu_encode_fns[] = { + Opcode_iiu_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_iii_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_iii_encode_fns[] = { + Opcode_iii_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_lict_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_lict_encode_fns[] = { + Opcode_lict_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_licw_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_licw_encode_fns[] = { + Opcode_licw_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_sict_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_sict_encode_fns[] = { + Opcode_sict_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_sicw_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_sicw_encode_fns[] = { + Opcode_sicw_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_dhwb_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_dhwb_encode_fns[] = { + Opcode_dhwb_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_dhwbi_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_dhwbi_encode_fns[] = { + Opcode_dhwbi_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_diwb_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_diwb_encode_fns[] = { + Opcode_diwb_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_diwbi_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_diwbi_encode_fns[] = { + Opcode_diwbi_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_dhi_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_dhi_encode_fns[] = { + Opcode_dhi_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_dii_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_dii_encode_fns[] = { + Opcode_dii_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_dpfr_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_dpfr_encode_fns[] = { + Opcode_dpfr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_dpfw_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_dpfw_encode_fns[] = { + Opcode_dpfw_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_dpfro_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_dpfro_encode_fns[] = { + Opcode_dpfro_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_dpfwo_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_dpfwo_encode_fns[] = { + Opcode_dpfwo_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_dpfl_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_dpfl_encode_fns[] = { + Opcode_dpfl_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_dhu_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_dhu_encode_fns[] = { + Opcode_dhu_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_diu_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_diu_encode_fns[] = { + Opcode_diu_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_sdct_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_sdct_encode_fns[] = { + Opcode_sdct_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_ldct_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_ldct_encode_fns[] = { + Opcode_ldct_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_ptevaddr_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_ptevaddr_encode_fns[] = { + Opcode_wsr_ptevaddr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_ptevaddr_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_ptevaddr_encode_fns[] = { + Opcode_rsr_ptevaddr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_ptevaddr_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_ptevaddr_encode_fns[] = { + Opcode_xsr_ptevaddr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_rasid_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_rasid_encode_fns[] = { + Opcode_rsr_rasid_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_rasid_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_rasid_encode_fns[] = { + Opcode_wsr_rasid_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_rasid_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_rasid_encode_fns[] = { + Opcode_xsr_rasid_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_itlbcfg_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_itlbcfg_encode_fns[] = { + Opcode_rsr_itlbcfg_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_itlbcfg_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_itlbcfg_encode_fns[] = { + Opcode_wsr_itlbcfg_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_itlbcfg_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_itlbcfg_encode_fns[] = { + Opcode_xsr_itlbcfg_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_dtlbcfg_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_dtlbcfg_encode_fns[] = { + Opcode_rsr_dtlbcfg_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_dtlbcfg_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_dtlbcfg_encode_fns[] = { + Opcode_wsr_dtlbcfg_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_dtlbcfg_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_dtlbcfg_encode_fns[] = { + Opcode_xsr_dtlbcfg_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_idtlb_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_idtlb_encode_fns[] = { + Opcode_idtlb_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_pdtlb_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_pdtlb_encode_fns[] = { + Opcode_pdtlb_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rdtlb0_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rdtlb0_encode_fns[] = { + Opcode_rdtlb0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rdtlb1_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rdtlb1_encode_fns[] = { + Opcode_rdtlb1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wdtlb_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wdtlb_encode_fns[] = { + Opcode_wdtlb_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_iitlb_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_iitlb_encode_fns[] = { + Opcode_iitlb_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_pitlb_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_pitlb_encode_fns[] = { + Opcode_pitlb_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_ritlb0_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_ritlb0_encode_fns[] = { + Opcode_ritlb0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_ritlb1_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_ritlb1_encode_fns[] = { + Opcode_ritlb1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_witlb_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_witlb_encode_fns[] = { + Opcode_witlb_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_ldpte_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_ldpte_encode_fns[] = { + Opcode_ldpte_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_hwwitlba_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_hwwitlba_encode_fns[] = { + Opcode_hwwitlba_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_hwwdtlba_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_hwwdtlba_encode_fns[] = { + Opcode_hwwdtlba_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_cpenable_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_cpenable_encode_fns[] = { + Opcode_rsr_cpenable_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_cpenable_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_cpenable_encode_fns[] = { + Opcode_wsr_cpenable_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_cpenable_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_cpenable_encode_fns[] = { + Opcode_xsr_cpenable_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_clamps_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_clamps_encode_fns[] = { + Opcode_clamps_Slot_inst_encode, 0, 0, Opcode_clamps_Slot_xt_flix64_slot0_encode, Opcode_clamps_Slot_xt_flix64_slot0_encode, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_min_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_min_encode_fns[] = { + Opcode_min_Slot_inst_encode, 0, 0, Opcode_min_Slot_xt_flix64_slot0_encode, Opcode_min_Slot_xt_flix64_slot0_encode, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_max_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_max_encode_fns[] = { + Opcode_max_Slot_inst_encode, 0, 0, Opcode_max_Slot_xt_flix64_slot0_encode, Opcode_max_Slot_xt_flix64_slot0_encode, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_minu_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_minu_encode_fns[] = { + Opcode_minu_Slot_inst_encode, 0, 0, Opcode_minu_Slot_xt_flix64_slot0_encode, Opcode_minu_Slot_xt_flix64_slot0_encode, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_maxu_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_maxu_encode_fns[] = { + Opcode_maxu_Slot_inst_encode, 0, 0, Opcode_maxu_Slot_xt_flix64_slot0_encode, Opcode_maxu_Slot_xt_flix64_slot0_encode, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_nsa_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_nsa_encode_fns[] = { + Opcode_nsa_Slot_inst_encode, 0, 0, Opcode_nsa_Slot_xt_flix64_slot0_encode, Opcode_nsa_Slot_xt_flix64_slot0_encode, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_nsau_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_nsau_encode_fns[] = { + Opcode_nsau_Slot_inst_encode, 0, 0, Opcode_nsau_Slot_xt_flix64_slot0_encode, Opcode_nsau_Slot_xt_flix64_slot0_encode, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_sext_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_sext_encode_fns[] = { + Opcode_sext_Slot_inst_encode, 0, 0, Opcode_sext_Slot_xt_flix64_slot0_encode, Opcode_sext_Slot_xt_flix64_slot0_encode, Opcode_sext_Slot_xt_flix64_slot1_encode, Opcode_sext_Slot_xt_flix64_slot2_encode, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_l32ai_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_l32ai_encode_fns[] = { + Opcode_l32ai_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_s32ri_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_s32ri_encode_fns[] = { + Opcode_s32ri_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_s32c1i_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_s32c1i_encode_fns[] = { + Opcode_s32c1i_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rsr_scompare1_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rsr_scompare1_encode_fns[] = { + Opcode_rsr_scompare1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wsr_scompare1_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wsr_scompare1_encode_fns[] = { + Opcode_wsr_scompare1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_xsr_scompare1_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_xsr_scompare1_encode_fns[] = { + Opcode_xsr_scompare1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_quou_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_quou_encode_fns[] = { + Opcode_quou_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_quos_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_quos_encode_fns[] = { + Opcode_quos_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_remu_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_remu_encode_fns[] = { + Opcode_remu_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rems_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rems_encode_fns[] = { + Opcode_rems_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mull_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mull_encode_fns[] = { + Opcode_mull_Slot_inst_encode, 0, 0, Opcode_mull_Slot_xt_flix64_slot0_encode, Opcode_mull_Slot_xt_flix64_slot0_encode, Opcode_mull_Slot_xt_flix64_slot1_encode, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_muluh_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_muluh_encode_fns[] = { + Opcode_muluh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mulsh_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mulsh_encode_fns[] = { + Opcode_mulsh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rur_fcr_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rur_fcr_encode_fns[] = { + Opcode_rur_fcr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wur_fcr_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wur_fcr_encode_fns[] = { + Opcode_wur_fcr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rur_fsr_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rur_fsr_encode_fns[] = { + Opcode_rur_fsr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wur_fsr_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wur_fsr_encode_fns[] = { + Opcode_wur_fsr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_add_s_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_add_s_encode_fns[] = { + Opcode_add_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_sub_s_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_sub_s_encode_fns[] = { + Opcode_sub_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mul_s_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mul_s_encode_fns[] = { + Opcode_mul_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_madd_s_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_madd_s_encode_fns[] = { + Opcode_madd_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_msub_s_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_msub_s_encode_fns[] = { + Opcode_msub_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_movf_s_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_movf_s_encode_fns[] = { + Opcode_movf_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_movt_s_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_movt_s_encode_fns[] = { + Opcode_movt_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_moveqz_s_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_moveqz_s_encode_fns[] = { + Opcode_moveqz_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_movnez_s_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_movnez_s_encode_fns[] = { + Opcode_movnez_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_movltz_s_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_movltz_s_encode_fns[] = { + Opcode_movltz_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_movgez_s_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_movgez_s_encode_fns[] = { + Opcode_movgez_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_abs_s_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_abs_s_encode_fns[] = { + Opcode_abs_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_mov_s_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_mov_s_encode_fns[] = { + Opcode_mov_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_neg_s_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_neg_s_encode_fns[] = { + Opcode_neg_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_un_s_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_un_s_encode_fns[] = { + Opcode_un_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_oeq_s_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_oeq_s_encode_fns[] = { + Opcode_oeq_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_ueq_s_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_ueq_s_encode_fns[] = { + Opcode_ueq_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_olt_s_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_olt_s_encode_fns[] = { + Opcode_olt_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_ult_s_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_ult_s_encode_fns[] = { + Opcode_ult_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_ole_s_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_ole_s_encode_fns[] = { + Opcode_ole_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_ule_s_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_ule_s_encode_fns[] = { + Opcode_ule_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_float_s_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_float_s_encode_fns[] = { + Opcode_float_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_ufloat_s_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_ufloat_s_encode_fns[] = { + Opcode_ufloat_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_round_s_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_round_s_encode_fns[] = { + Opcode_round_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_ceil_s_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_ceil_s_encode_fns[] = { + Opcode_ceil_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_floor_s_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_floor_s_encode_fns[] = { + Opcode_floor_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_trunc_s_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_trunc_s_encode_fns[] = { + Opcode_trunc_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_utrunc_s_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_utrunc_s_encode_fns[] = { + Opcode_utrunc_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_rfr_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_rfr_encode_fns[] = { + Opcode_rfr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_wfr_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_wfr_encode_fns[] = { + Opcode_wfr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_lsi_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_lsi_encode_fns[] = { + Opcode_lsi_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_lsiu_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_lsiu_encode_fns[] = { + Opcode_lsiu_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_lsx_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_lsx_encode_fns[] = { + Opcode_lsx_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_lsxu_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_lsxu_encode_fns[] = { + Opcode_lsxu_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_ssi_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_ssi_encode_fns[] = { + Opcode_ssi_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_ssiu_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_ssiu_encode_fns[] = { + Opcode_ssiu_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_ssx_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_ssx_encode_fns[] = { + Opcode_ssx_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_ssxu_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_ssxu_encode_fns[] = { + Opcode_ssxu_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0 + }; + +-const xtensa_opcode_encode_fn Opcode_beqz_w18_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_beqz_w18_encode_fns[] = { + 0, 0, 0, 0, 0, 0, 0, Opcode_beqz_w18_Slot_xt_flix64_slot3_encode + }; + +-const xtensa_opcode_encode_fn Opcode_bnez_w18_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bnez_w18_encode_fns[] = { + 0, 0, 0, 0, 0, 0, 0, Opcode_bnez_w18_Slot_xt_flix64_slot3_encode + }; + +-const xtensa_opcode_encode_fn Opcode_bgez_w18_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bgez_w18_encode_fns[] = { + 0, 0, 0, 0, 0, 0, 0, Opcode_bgez_w18_Slot_xt_flix64_slot3_encode + }; + +-const xtensa_opcode_encode_fn Opcode_bltz_w18_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bltz_w18_encode_fns[] = { + 0, 0, 0, 0, 0, 0, 0, Opcode_bltz_w18_Slot_xt_flix64_slot3_encode + }; + +-const xtensa_opcode_encode_fn Opcode_beqi_w18_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_beqi_w18_encode_fns[] = { + 0, 0, 0, 0, 0, 0, 0, Opcode_beqi_w18_Slot_xt_flix64_slot3_encode + }; + +-const xtensa_opcode_encode_fn Opcode_bnei_w18_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bnei_w18_encode_fns[] = { + 0, 0, 0, 0, 0, 0, 0, Opcode_bnei_w18_Slot_xt_flix64_slot3_encode + }; + +-const xtensa_opcode_encode_fn Opcode_bgei_w18_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bgei_w18_encode_fns[] = { + 0, 0, 0, 0, 0, 0, 0, Opcode_bgei_w18_Slot_xt_flix64_slot3_encode + }; + +-const xtensa_opcode_encode_fn Opcode_blti_w18_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_blti_w18_encode_fns[] = { + 0, 0, 0, 0, 0, 0, 0, Opcode_blti_w18_Slot_xt_flix64_slot3_encode + }; + +-const xtensa_opcode_encode_fn Opcode_bgeui_w18_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bgeui_w18_encode_fns[] = { + 0, 0, 0, 0, 0, 0, 0, Opcode_bgeui_w18_Slot_xt_flix64_slot3_encode + }; + +-const xtensa_opcode_encode_fn Opcode_bltui_w18_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bltui_w18_encode_fns[] = { + 0, 0, 0, 0, 0, 0, 0, Opcode_bltui_w18_Slot_xt_flix64_slot3_encode + }; + +-const xtensa_opcode_encode_fn Opcode_bbci_w18_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bbci_w18_encode_fns[] = { + 0, 0, 0, 0, 0, 0, 0, Opcode_bbci_w18_Slot_xt_flix64_slot3_encode + }; + +-const xtensa_opcode_encode_fn Opcode_bbsi_w18_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bbsi_w18_encode_fns[] = { + 0, 0, 0, 0, 0, 0, 0, Opcode_bbsi_w18_Slot_xt_flix64_slot3_encode + }; + +-const xtensa_opcode_encode_fn Opcode_beq_w18_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_beq_w18_encode_fns[] = { + 0, 0, 0, 0, 0, 0, 0, Opcode_beq_w18_Slot_xt_flix64_slot3_encode + }; + +-const xtensa_opcode_encode_fn Opcode_bne_w18_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bne_w18_encode_fns[] = { + 0, 0, 0, 0, 0, 0, 0, Opcode_bne_w18_Slot_xt_flix64_slot3_encode + }; + +-const xtensa_opcode_encode_fn Opcode_bge_w18_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bge_w18_encode_fns[] = { + 0, 0, 0, 0, 0, 0, 0, Opcode_bge_w18_Slot_xt_flix64_slot3_encode + }; + +-const xtensa_opcode_encode_fn Opcode_blt_w18_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_blt_w18_encode_fns[] = { + 0, 0, 0, 0, 0, 0, 0, Opcode_blt_w18_Slot_xt_flix64_slot3_encode + }; + +-const xtensa_opcode_encode_fn Opcode_bgeu_w18_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bgeu_w18_encode_fns[] = { + 0, 0, 0, 0, 0, 0, 0, Opcode_bgeu_w18_Slot_xt_flix64_slot3_encode + }; + +-const xtensa_opcode_encode_fn Opcode_bltu_w18_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bltu_w18_encode_fns[] = { + 0, 0, 0, 0, 0, 0, 0, Opcode_bltu_w18_Slot_xt_flix64_slot3_encode + }; + +-const xtensa_opcode_encode_fn Opcode_bany_w18_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bany_w18_encode_fns[] = { + 0, 0, 0, 0, 0, 0, 0, Opcode_bany_w18_Slot_xt_flix64_slot3_encode + }; + +-const xtensa_opcode_encode_fn Opcode_bnone_w18_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bnone_w18_encode_fns[] = { + 0, 0, 0, 0, 0, 0, 0, Opcode_bnone_w18_Slot_xt_flix64_slot3_encode + }; + +-const xtensa_opcode_encode_fn Opcode_ball_w18_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_ball_w18_encode_fns[] = { + 0, 0, 0, 0, 0, 0, 0, Opcode_ball_w18_Slot_xt_flix64_slot3_encode + }; + +-const xtensa_opcode_encode_fn Opcode_bnall_w18_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bnall_w18_encode_fns[] = { + 0, 0, 0, 0, 0, 0, 0, Opcode_bnall_w18_Slot_xt_flix64_slot3_encode + }; + +-const xtensa_opcode_encode_fn Opcode_bbc_w18_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bbc_w18_encode_fns[] = { + 0, 0, 0, 0, 0, 0, 0, Opcode_bbc_w18_Slot_xt_flix64_slot3_encode + }; + +-const xtensa_opcode_encode_fn Opcode_bbs_w18_encode_fns[] = { ++xtensa_opcode_encode_fn Opcode_bbs_w18_encode_fns[] = { + 0, 0, 0, 0, 0, 0, 0, Opcode_bbs_w18_Slot_xt_flix64_slot3_encode + }; + +@@ -18795,7 +18795,7 @@ Slot_xt_format2_Format_xt_flix64_slot3_28_set (xtensa_insnbuf insn, + insn[1] = (insn[1] & ~0x70000000) | ((slotbuf[1] & 0x7) << 28); + } + +-static const xtensa_get_field_fn ++static xtensa_get_field_fn + Slot_inst_get_field_fns[] = { + Field_t_Slot_inst_get, + Field_bbi4_Slot_inst_get, +@@ -18934,7 +18934,7 @@ Slot_inst_get_field_fns[] = { + Implicit_Field_brall_get + }; + +-static const xtensa_set_field_fn ++static xtensa_set_field_fn + Slot_inst_set_field_fns[] = { + Field_t_Slot_inst_set, + Field_bbi4_Slot_inst_set, +@@ -19073,7 +19073,7 @@ Slot_inst_set_field_fns[] = { + Implicit_Field_set + }; + +-static const xtensa_get_field_fn ++static xtensa_get_field_fn + Slot_inst16a_get_field_fns[] = { + Field_t_Slot_inst16a_get, + 0, +@@ -19212,7 +19212,7 @@ Slot_inst16a_get_field_fns[] = { + Implicit_Field_brall_get + }; + +-static const xtensa_set_field_fn ++static xtensa_set_field_fn + Slot_inst16a_set_field_fns[] = { + Field_t_Slot_inst16a_set, + 0, +@@ -19351,7 +19351,7 @@ Slot_inst16a_set_field_fns[] = { + Implicit_Field_set + }; + +-static const xtensa_get_field_fn ++static xtensa_get_field_fn + Slot_inst16b_get_field_fns[] = { + Field_t_Slot_inst16b_get, + 0, +@@ -19490,7 +19490,7 @@ Slot_inst16b_get_field_fns[] = { + Implicit_Field_brall_get + }; + +-static const xtensa_set_field_fn ++static xtensa_set_field_fn + Slot_inst16b_set_field_fns[] = { + Field_t_Slot_inst16b_set, + 0, +@@ -19629,7 +19629,7 @@ Slot_inst16b_set_field_fns[] = { + Implicit_Field_set + }; + +-static const xtensa_get_field_fn ++static xtensa_get_field_fn + Slot_xt_flix64_slot0_get_field_fns[] = { + Field_t_Slot_xt_flix64_slot0_get, + 0, +@@ -19768,7 +19768,7 @@ Slot_xt_flix64_slot0_get_field_fns[] = { + Implicit_Field_brall_get + }; + +-static const xtensa_set_field_fn ++static xtensa_set_field_fn + Slot_xt_flix64_slot0_set_field_fns[] = { + Field_t_Slot_xt_flix64_slot0_set, + 0, +@@ -19907,7 +19907,7 @@ Slot_xt_flix64_slot0_set_field_fns[] = { + Implicit_Field_set + }; + +-static const xtensa_get_field_fn ++static xtensa_get_field_fn + Slot_xt_flix64_slot1_get_field_fns[] = { + Field_t_Slot_xt_flix64_slot1_get, + 0, +@@ -20046,7 +20046,7 @@ Slot_xt_flix64_slot1_get_field_fns[] = { + Implicit_Field_brall_get + }; + +-static const xtensa_set_field_fn ++static xtensa_set_field_fn + Slot_xt_flix64_slot1_set_field_fns[] = { + Field_t_Slot_xt_flix64_slot1_set, + 0, +@@ -20185,7 +20185,7 @@ Slot_xt_flix64_slot1_set_field_fns[] = { + Implicit_Field_set + }; + +-static const xtensa_get_field_fn ++static xtensa_get_field_fn + Slot_xt_flix64_slot2_get_field_fns[] = { + Field_t_Slot_xt_flix64_slot2_get, + 0, +@@ -20324,7 +20324,7 @@ Slot_xt_flix64_slot2_get_field_fns[] = { + Implicit_Field_brall_get + }; + +-static const xtensa_set_field_fn ++static xtensa_set_field_fn + Slot_xt_flix64_slot2_set_field_fns[] = { + Field_t_Slot_xt_flix64_slot2_set, + 0, +@@ -20463,7 +20463,7 @@ Slot_xt_flix64_slot2_set_field_fns[] = { + Implicit_Field_set + }; + +-static const xtensa_get_field_fn ++static xtensa_get_field_fn + Slot_xt_flix64_slot3_get_field_fns[] = { + Field_t_Slot_xt_flix64_slot3_get, + 0, +@@ -20602,7 +20602,7 @@ Slot_xt_flix64_slot3_get_field_fns[] = { + Implicit_Field_brall_get + }; + +-static const xtensa_set_field_fn ++static xtensa_set_field_fn + Slot_xt_flix64_slot3_set_field_fns[] = { + Field_t_Slot_xt_flix64_slot3_set, + 0, +@@ -20814,15 +20814,15 @@ Format_xt_format2_encode (xtensa_insnbuf insn) + insn[1] = 0; + } + +-static const int Format_x24_slots[] = { 0 }; ++static int Format_x24_slots[] = { 0 }; + +-static const int Format_x16a_slots[] = { 1 }; ++static int Format_x16a_slots[] = { 1 }; + +-static const int Format_x16b_slots[] = { 2 }; ++static int Format_x16b_slots[] = { 2 }; + +-static const int Format_xt_format1_slots[] = { 3, 5, 6 }; ++static int Format_xt_format1_slots[] = { 3, 5, 6 }; + +-static const int Format_xt_format2_slots[] = { 4, 7 }; ++static int Format_xt_format2_slots[] = { 4, 7 }; + + static xtensa_format_internal formats[] = { + { "x24", 3, Format_x24_encode, 1, Format_x24_slots }, +@@ -20849,7 +20849,7 @@ format_decoder (const xtensa_insnbuf insn) + return -1; + } + +-static const int length_table[16] = { ++static int length_table[16] = { + 3, + 3, + 3, +diff --git a/include/xtensa-isa-internal.h b/include/xtensa-isa-internal.h +index 11b781fbad..6e8fc2eb14 100644 +--- a/include/xtensa-isa-internal.h ++++ b/include/xtensa-isa-internal.h +@@ -53,29 +53,29 @@ typedef void (*xtensa_opcode_encode_fn) (xtensa_insnbuf); + typedef int (*xtensa_format_decode_fn) (const xtensa_insnbuf); + typedef int (*xtensa_length_decode_fn) (const unsigned char *); + +-typedef const struct xtensa_format_internal_struct ++typedef struct xtensa_format_internal_struct + { + const char *name; /* Instruction format name. */ + int length; /* Instruction length in bytes. */ + xtensa_format_encode_fn encode_fn; + int num_slots; +- const int *slot_id; /* Array[num_slots] of slot IDs. */ ++ int *slot_id; /* Array[num_slots] of slot IDs. */ + } xtensa_format_internal; + +-typedef const struct xtensa_slot_internal_struct ++typedef struct xtensa_slot_internal_struct + { + const char *name; /* Not necessarily unique. */ + const char *format; + int position; + xtensa_get_slot_fn get_fn; + xtensa_set_slot_fn set_fn; +- const xtensa_get_field_fn *get_field_fns; /* Array[field_id]. */ +- const xtensa_set_field_fn *set_field_fns; /* Array[field_id]. */ ++ xtensa_get_field_fn *get_field_fns; /* Array[field_id]. */ ++ xtensa_set_field_fn *set_field_fns; /* Array[field_id]. */ + xtensa_opcode_decode_fn opcode_decode_fn; + const char *nop_name; + } xtensa_slot_internal; + +-typedef const struct xtensa_operand_internal_struct ++typedef struct xtensa_operand_internal_struct + { + const char *name; + int field_id; +@@ -88,7 +88,7 @@ typedef const struct xtensa_operand_internal_struct + xtensa_undo_reloc_fn undo_reloc; /* Undo a PC-relative relocation. */ + } xtensa_operand_internal; + +-typedef const struct xtensa_arg_internal_struct ++typedef struct xtensa_arg_internal_struct + { + union { + int operand_id; /* For normal operands. */ +@@ -97,7 +97,7 @@ typedef const struct xtensa_arg_internal_struct + char inout; /* Direction: 'i', 'o', or 'm'. */ + } xtensa_arg_internal; + +-typedef const struct xtensa_iclass_internal_struct ++typedef struct xtensa_iclass_internal_struct + { + int num_operands; /* Size of "operands" array. */ + xtensa_arg_internal *operands; /* Array[num_operands]. */ +@@ -109,17 +109,17 @@ typedef const struct xtensa_iclass_internal_struct + xtensa_interface *interfaceOperands; /* Array[num_interfaceOperands]. */ + } xtensa_iclass_internal; + +-typedef const struct xtensa_opcode_internal_struct ++typedef struct xtensa_opcode_internal_struct + { + const char *name; /* Opcode mnemonic. */ + int iclass_id; /* Iclass for this opcode. */ + uint32 flags; /* See XTENSA_OPCODE_* flags. */ +- const xtensa_opcode_encode_fn *encode_fns; /* Array[slot_id]. */ ++ xtensa_opcode_encode_fn *encode_fns; /* Array[slot_id]. */ + int num_funcUnit_uses; /* Number of funcUnit_use entries. */ + xtensa_funcUnit_use *funcUnit_uses; /* Array[num_funcUnit_uses]. */ + } xtensa_opcode_internal; + +-typedef const struct xtensa_regfile_internal_struct ++typedef struct xtensa_regfile_internal_struct + { + const char *name; /* Full name of the regfile. */ + const char *shortname; /* Abbreviated name. */ +@@ -128,7 +128,7 @@ typedef const struct xtensa_regfile_internal_struct + int num_entries; /* Number of registers. */ + } xtensa_regfile_internal; + +-typedef const struct xtensa_interface_internal_struct ++typedef struct xtensa_interface_internal_struct + { + const char *name; /* Interface name. */ + int num_bits; /* Width of the interface. */ +@@ -137,20 +137,20 @@ typedef const struct xtensa_interface_internal_struct + char inout; /* "i" or "o". */ + } xtensa_interface_internal; + +-typedef const struct xtensa_funcUnit_internal_struct ++typedef struct xtensa_funcUnit_internal_struct + { + const char *name; /* Functional unit name. */ + int num_copies; /* Number of instances. */ + } xtensa_funcUnit_internal; + +-typedef const struct xtensa_state_internal_struct ++typedef struct xtensa_state_internal_struct + { + const char *name; /* State name. */ + int num_bits; /* Number of state bits. */ + uint32 flags; /* See XTENSA_STATE_* flags. */ + } xtensa_state_internal; + +-typedef const struct xtensa_sysreg_internal_struct ++typedef struct xtensa_sysreg_internal_struct + { + const char *name; /* Register name. */ + int number; /* Register number. */ +-- +2.29.2 +